Hi All,
I am having trouble getting a “stable” debug environment with openocd and eclipse.
First my openocd.cfg is:
interface ft2232
ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
ft2232_layout turtelizer2
ft2232_vid_pid 0x0403 0x6010
# NXP LPC1766 Cortex-M3 with 256kB Flash and 32kB+32kB Local On-Chip SRAM,
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc1766
}
# After reset the chip is clocked by the ~4MHz internal RC oscillator.
# When board-specific code (reset-init handler or device firmware)
# configures another oscillator and/or PLL0, set CCLK to match; if
# you don't, then flash erase and write operations may misbehave.
# (The ROM code doing those updates cares about core clock speed...)
#
# CCLK is the core clock frequency in KHz
if { [info exists CCLK ] } {
set _CCLK $CCLK
} else {
set _CCLK 4000
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477
}
#delays on reset lines
adapter_nsrst_delay 200
jtag_ntrst_delay 200
# LPC2000 & LPC1700 -> SRST causes TRST
# reset_config srst_pulls_trst
reset_config trst_and_srst separate
# reset_config trst_and_srst srst_pulls_trst
# reset_config srst_only combined srst_gates_jtag
jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
# jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME
# LPC1766 has 32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000)
# and 32K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000).
$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000
# $_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0
# LPC1766 has 256kB of flash memory, managed by ROM code (including a
# boot loader which verifies the flash exception table's checksum).
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc1700 $_CCLK calc_checksum
# Run with *real slow* clock by default since the
# boot rom could have been playing with the PLL, so
# we have no idea what clock the target is running at. Actually should be 4Mhz/6 = 666khz, so use 500
# jtag_khz 10
jtag_khz 500
$_TARGETNAME configure -event reset-init {
# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
# "User Flash Mode" where interrupt vectors are _not_ remapped,
# and reside in flash instead).
#
# See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description
# Bit Symbol Value Description Reset
# value
# 0 MAP Memory map control. 0
# 0 Boot mode. A portion of the Boot ROM is mapped to address 0.
# 1 User mode. The on-chip Flash memory is mapped to address 0.
# 31:1 - Reserved. The value read from a reserved bit is not defined. NA
#
# http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1768&type=user
mww 0x400FC040 0x01
}
The init commands I am giving the Eclipse GDB hardware debug plugin are:
target remote localhost:3333
monitor reset
monitor halt
monitor wait_halt
monitor flash write_image erase unlock C:/eclipse/LPC17xx_test/dbg/Trial.elf
monitor sleep 200
monitor reset run
monitor exit
And a typical debug session output from openocd is:
$ ./openocd.exe
Open On-Chip Debugger 0.5.0-dev (2010-09-29-12:40)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
adapter_nsrst_delay: 200
jtag_ntrst_delay: 200
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
500 kHz
Info : device: 4 "2232C"
Info : deviceID: 67330064
Info : SerialNumber: TLTKDK15A
Info : Description: Turtelizer JTAG/RS232 Adapter A
Info : clock speed 500 kHz
Info : JTAG tap: lpc1766.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : lpc1766.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : accepting 'gdb' connection from 3333
Warn : acknowledgment received, but no packet pending
undefined debug reason 6 - target needs reset
Info : JTAG tap: lpc1766.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x81000000 pc: 0x1fff0ba4 msp: 0x10007fb8
auto erase enabled
Warn : Verification will fail since checksum in image (0x00000000) to be written to flash is different from calculated vector checksum (0xefff7f43).
Warn : To remove this warning modify build tools on developer PC to inject correct LPC vector checksum.
wrote 36864 bytes from file C:/eclipse/LPC17xx_test/dbg/Trial.elf in 4.290000s (8.392 KiB/s)
Warn : negative acknowledgment, but no packet pending
Info : JTAG tap: lpc1766.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Warn : WARNING! The target is already running. All changes GDB did to registers will be discarded! Waiting for target to halt.
My problem is that is:
- I get un-reliable gdb startup’s … it allways downloads the image ok, but on startup it
a) Starts up running, so I have to give eclipse a “continue” to get in sync, then I can pause/continue.
b) Starts up and breaks at the interrupt vectors … and I cannot continue … have to restart openocd and eclipse/gdb
- If I do get a debug session going as in a) above, I can put breakpoints in ok, but single stepping gives errors … also I can see local variables ok, but cannot see globals …
All in all, not a good experience …
Can anyone offer some suggestions please …