make parameters ignored under sh

Development Boards MicroMod
1

Interesting simple item that may be related to the real problem:

I have the latest openocd 131rc2 (and make utilities) installed.

The following is done from a windows command shell in a directory that does not have a makefile:

C:\usr>make -v
GNU Make 3.81
Copyright (C) 2006  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

This program built for i686-pc-mingw32

C:\usr>sh
sh-2.04$ make -v
make: *** No targets specified and no makefile found.  Stop.
sh-2.04$ exit
exit

C:\usr>

Note that the -v argument is ignored when make is called from sh. All arguments are ignored when make is called from sh. What could be the problem?

The real issue I’m trying to solve is invocation of sub makes in subdirectories from a master make file. It is difficult to do when make ignores its command line options. This technique works fine under cygwin, but I would like to stick with yagarto instead of compiling my own toolchain if possible.

Thanks for the help.

2

Hi all,

I installed the latest MSYS Core from sourceforge:

http://downloads.sourceforge.net/mingw/ … g_mirror=1

I put it in the path in place the the MSYS utilities included with openocd. It solved my problem and seems to be a great little unix-ish environment for those who like such things.

-jcp

3

“a great little unix-ish environment for those who like such things”

Another great solution for this purpose is called “Linux”, and *BSD is supposed to serve this purpose quite well, too :wink:

Regards,

Dominic