OpenOCD 0.4.0 cofiguration for OLIMEX ARM-USB-TINY-H

[afinko]

Hi,

I am using Windows 7 (32bit), Eclipse Helios, Yagarto 2.20.1 with GCC 4.5.0, Zylin and OLIMEX ARM-USB-TINY-H JTAG debbuger. OpenOCD 0.4.0 for debbuging. This is connected to OLIMEX SAM7-P256 eval board with Atmel ARM7 core.

I am not able to download flash to the board through the openOCD

I am using libusb-win32 driver.

The problem is, that I do not know, how to make (customize a bit) .cfg file for OpenOCD in version 0.4.0.

There is a great manual how to do this for older version of OpenOCD:

http://gnuarm.alexthegeek.com/atmel/Usi … sion_C.pdf

The old_version.cfg file looks like this:

#define our ports
telnet_port 4444
gdb_port 3333
#commands specific to the Olimex ARM-USB-OCD
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG A"
ft2232_layout "olimex-jtag"
ft2232_vid_pid 0x15BA 0x0003
jtag_speed 2
jtag_nsrst_delay 200
jtag_ntrst_delay 200
#reset_config <signals> [combination] [trst_type] [srst_type]
reset_config srst_only srst_pulls_trst
#jtag_device <IR length> <IR capture> <IR mask> <IDCODE instruction>
jtag_device 4 0x1 0xf 0xe
#daemon_startup <'attach'|'reset'>
daemon_startup reset
#target <type> <endianess> <reset_mode> <jtag#> [variant]
target arm7tdmi little run_and_init 0 arm7tdmi_r4
#run_and_halt_time <target#> <time_in_ms>
run_and_halt_time 0 30
# commands below are specific to AT91sam7 Flash Programming
# ---------------------------------------------------------
#target_script specifies the flash programming script file
target_script 0 reset script.ocd
#working_area <target#> <address> <size> <'backup'|'nobackup'>
working_area 0 0x40000000 0x4000 nobackup
#flash bank at91sam7 0 0 0 0 <target#>
flash bank at91sam7 0 0 0 0 0

with the script.ocd file:

wait_halt # halt the processor and wait
armv4_5 core_state arm # select the core state
mww 0xffffff60 0x00320100 # set flash wait state (AT91C_MC_FMR)
mww 0xfffffd44 0xa0008000 # watchdog disable (AT91C_WDTC_WDMR)
mww 0xfffffc20 0xa0000601 # enable main oscillator (AT91C_PMC_MOR)
wait 100 # wait 100 ms
mww 0xfffffc2c 0x00480a0e # set PLL register (AT91C_PMC_PLLR)
wait 200 # wait 200 ms
mww 0xfffffc30 0x7 # set master clock to PLL (AT91C_PMC_MCKR)
wait 100 # wait 100 ms
mww 0xfffffd08 0xa5000401 # enable user reset AT91C_RSTC_RMR
flash write 0 main.bin 0x0 # program the onchip flash
reset # reset processor
shutdown # stop OpenOCD

However, this is not working with OpenOCD V 0.4.0.

If I run this script with:

openocd -f old_version.cfg

I will receive the error:

Runtime error, file "old_version.cfg", line 9
    invalid command name "jtag_speed"

If I change the “jtag_speed 2” to the “jtag_khz 15000” I will receive the error:

Runtime error, file "old_version.cfg", line 9
    invalid command name "jtag_device"

I have read the lot from “OpenOCD User’s Guide.pdf” and I found, that in C:\Program Files\OpenOCD\0.4.0\ there are some examples for OLIMEX ARM-USB-TINY-H as well as for at91sam7sx ARM core.

I tried to use these:

olimex-arm-usb-tiny-h.cfg and at91sam7sx.cfg

olimex-arm-usb-tiny-h.cfg:

interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x002a

at91sam7sx.cfg:

reset_config srst_only srst_pulls_trst

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME at91sam7s
}

if { [info exists ENDIAN] } {
   set  _ENDIAN $ENDIAN
} else {
   set  _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x3f0f0f0f
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu

target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
$_TARGETNAME configure -event reset-init {
        soft_reset_halt
        # RSTC_CR : Reset peripherals
        mww 0xfffffd00 0xa5000004
        # disable watchdog
	mww 0xfffffd44 0x00008000
	# enable user reset
	mww 0xfffffd08 0xa5000001
	# CKGR_MOR : enable the main oscillator
	mww 0xfffffc20 0x00000601
	sleep 10
	# CKGR_PLLR: 96.1097 MHz
	mww 0xfffffc2c 0x00481c0e
	sleep 10
	# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
	mww 0xfffffc30 0x00000007
	sleep 10
	# MC_FMR: flash mode (FWS=1,FMCN=73)
	mww 0xffffff60 0x00490100
	sleep 100
}

$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0

#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432

In script:

openocd -f olimex-arm-usb-tiny-h.cfg -f at91sam7sx.cfg

I received the error:

Open On-Chip Debugger 0.4.0 (2010-02-22-19:05)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.berlios.de/doc/doxygen/bugs.html
srst_only srst_pulls_trst srst_gates_jtag srst_open_drain
Warn : use 'at91sam7s.cpu' as target identifier, not '0'
Info : max TCK change to: 30000 kHz
Info : clock speed 30000 kHz
Info : JTAG tap: at91sam7s.cpu tap/device found: 0x7f1f1f1f (mfg: 0x78f, part: 0xf1f1, ver: 0x7)
Warn : JTAG tap: at91sam7s.cpu       UNEXPECTED: 0x7f1f1f1f (mfg: 0x78f, part: 0xf1f1, ver: 0x7)
Error: JTAG tap: at91sam7s.cpu  expected 1 of 1: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)
Error: Trying to use configured scan chain anyway...
Error: at91sam7s.cpu: IR capture error; saw 0x03 not 0x01
Info : JTAG tap: at91sam7s.cpu tap/device found: 0x7f1f1f1f (mfg: 0x78f, part: 0xf1f1, ver: 0x7)
Warn : JTAG tap: at91sam7s.cpu       UNEXPECTED: 0x7f1f1f1f (mfg: 0x78f, part: 0xf1f1, ver: 0x7)
Error: JTAG tap: at91sam7s.cpu  expected 1 of 1: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)
Error: Trying to use configured scan chain anyway...
Error: at91sam7s.cpu: IR capture error; saw 0x03 not 0x01
Command handler execution failed
Warn : jtag initialization failed; try 'jtag init' again.

Then I changed the olimex-arm-usb-tiny-h.cfg to:

interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x002a
jtag_khz 15000
jtag_nsrst_delay 200
jtag_ntrst_delay 200

and I received no errors at all:

Open On-Chip Debugger 0.4.0 (2010-02-22-19:05)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.berlios.de/doc/doxygen/bugs.html
15000 kHz
jtag_nsrst_delay: 200
jtag_ntrst_delay: 200
srst_only srst_pulls_trst srst_gates_jtag srst_open_drain
Warn : use 'at91sam7s.cpu' as target identifier, not '0'
Info : max TCK change to: 30000 kHz
Info : clock speed 15000 kHz
Info : JTAG tap: at91sam7s.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)
Info : Embedded ICE version 1
Info : at91sam7s.cpu: hardware has 2 breakpoint/watchpoint units

If I added the “shutdown # stop OpenOCD” line at the end of at91sam7sx.cfg, I received no errors and the OpenOCD has finished:

C:\Program Files\OpenOCD\0.4.0\bin>openocd -f olimex-arm-usb-tiny-h.cfg -f at91s
am7sx.cfg
Open On-Chip Debugger 0.4.0 (2010-02-22-19:05)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.berlios.de/doc/doxygen/bugs.html
15000 kHz
jtag_nsrst_delay: 200
jtag_ntrst_delay: 200
srst_only srst_pulls_trst srst_gates_jtag srst_open_drain
Warn : use 'at91sam7s.cpu' as target identifier, not '0'
shutdown command invoked
Info : max TCK change to: 30000 kHz
Info : clock speed 15000 kHz
Info : JTAG tap: at91sam7s.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0
xf0f0, ver: 0x3)
Info : Embedded ICE version 1
Info : at91sam7s.cpu: hardware has 2 breakpoint/watchpoint units

C:\Program Files\OpenOCD\0.4.0\bin>

That is fine, because I know, that “OpenOCD - JTAG - Eval Board” works fine, with no errors.

However, how to flash the main.bin to the onchip flash?

in script.ocd there was:

flash write 0 main.bin 0x0 # program the onchip flash

what should flash the device.

but in at91sam7sx.cfg, there is nothing like that.

I tried to put the line “target_script 0 reset script.ocd” somewhere in at91sam7sx.cfg, but I received the error, or nothing happened.

Any idea how to write main.bin to the onchip flash?

I have the correct main.bin, because I am able to flash it to the onchip flash with SAM-BA through the SAM-ICE and the leds are blinking. I used the example: “demo_at91sam7_p64_blink_flash” for compiling.

Thanks in advance.

Afi

[afinko]

I tried to set the OpenOCD according this manual:

http://carrierwave.wordpress.com/2009/0 … debugging/

However, the older version of OpenOCD was used, and I obtained a lot of errors when trying to run

Afi

[tparviai]

I don’t know whether this really helps but below my script that I use to flash SAM7-EX256 board.

Environment: Ubuntu 10.04 / openocd 0.3.1 / ARM-USB-TINY

openocd.cfg

source [find interface/olimex-jtag-tiny.cfg]
source [find target/sam7x256.cfg]

Start OpenOCD in the folder where the openocd.cfg file is, this ensures that it uses that file. The command that I use to flash the file (via telnet connection) is:

flash write_bank 0 sam7-ex256-kernel.bin 0x0

If you have other interface / target then you need to change the correct one to the openocd.cfg script file, however it might be that you can you same target for several boards, I for example use sam7x256.cfg target file to flash SAM7S header boards also.

[afinko]

Finally, I resolved the problem and was able to get it WORK

my armflash.cfg openocd 0.4.0 configuration file for flashing is:

telnet_port 4444
gdb_port 3333

interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x002a

jtag_khz 15000
jtag_nsrst_delay 200
jtag_ntrst_delay 200

set CPU_TYPE   arm
set CPU_NAME   arm7tdmi
set CPU_ARCH   armv4t
set CPU_MAX_ADDRESS 0xFFFFFFFF
set CPU_NBITS  32

reset_config srst_only srst_pulls_trst

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME sam7x256
}

if { [info exists ENDIAN] } {
   set  _ENDIAN $ENDIAN
} else {
   set  _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x3f0f0f0f
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi

$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432
                                                                        
# Run the flashing script on reset event
$_TARGETNAME configure -event reset-init {
	# disable watchdog
	mww 0xfffffd44 0x00008000
	# enable user reset
	mww 0xfffffd08 0xa5000001
	# CKGR_MOR : enable the main oscillator
	mww 0xfffffc20 0x00000601
	sleep 10
	# CKGR_PLLR: 96.1097 MHz
	mww 0xfffffc2c 0x00481c0e
	sleep 10
	# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
	mww 0xfffffc30 0x00000007
	sleep 10
	# MC_FMR: flash mode (FWS=1,FMCN=60)
	mww 0xffffff60 0x003c0100
	sleep 100

  arm7_9 dcc_downloads enable
  arm7_9 fast_memory_access enable
  wait_halt	
  flash probe 0
  #This next line should only be run when it is necessary to clear the lock bits
  #flash protect 0 0 1 off
  #flash erase_sector 0 0 0
  flash write_bank 0 main.bin 0x0
  mww 0xfffffd08 0xa5000401
  resume
} 

#Forces execution of the reset and init events, then quit
init
reset init
shutdown

the main.bin is flash file.

I resolved also the issue with debugging.

In Eclipse debug configuration I am using:

Zylin embedded debug (Native)

Project: demo_at91sam7_p64_blink_flash

C/C++ Application: main.out

GDB debugger: C:\Program Files\yagarto220\bin\arm-none-eabi-gdb.exe

GDB command file:

Commands → ‘Initialize’ commands:

target remote localhost:3333
monitor reset init
monitor sleep 500
monitor poll
monitor soft_reset_halt
#monitor arm7_9 sw_bkpts enable
monitor gdb_breakpoint_override hard
monitor arm7_9 dbgrq enable
# RSTC_CR : Reset peripherals
monitor mww 0xfffffd00 0xa5000004
# disable watchdog
monitor mww 0xfffffd44 0x00008000
# enable user reset
monitor mww 0xfffffd08 0xa5000001
# CKGR_MOR : enable the main oscillator
monitor mww 0xfffffc20 0x00000601
monitor sleep 10
# CKGR_PLLR: 96.1097 MHz
monitor mww 0xfffffc2c 0x00481c0e
monitor sleep 10
# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
monitor mww 0xfffffc30 0x00000007
monitor sleep 10
# MC_FMR: flash mode (FWS=1,FMCN=73)
monitor mww 0xffffff60 0x00490100
monitor sleep 100
set mem inaccessible-by-default off
load
break main
continue

This is working for my configuration, as a debugging in FLASH.

The main problem was the command:

monitor arm7_9 sw_bkpts enable

that is not supported in OpenOCD 0.4.0 and generates the error: ``` arm7_9 sw_bkpts enable: command requires more arguments ``` It has to be replaced with:

monitor gdb_breakpoint_override hard
monitor arm7_9 dbgrq enable

Hopefully it will help to someone.

[afinko]

Several improvements in my codes:

1. The program is loaded into the core flash twice during debugging, once when the armflash.cfg with commented “shutdown” is started in order to run OpenOCD server. The second one, when the command “load” is executed in “Commands → ‘Initialize’ commands” is executed in order to be ready to debug.

Simple solution:

comment also the command “reset init” at the end of armflash.cfg.

I have two files now: armflash.cfg for flashing, and armflash_debug.cfg for debuging.

2. I found a several errors and warnings during debugging when the:

arm7_9 dcc_downloads enable

arm7_9 fast_memory_access enable

are used in armflash_debug.cfg.

Therefore, I added:

arm7_9 dcc_downloads disable

arm7_9 fast_memory_access disable

in between the “mww 0xfffffd08 0xa5000401” and “resume” in armflash_debug.cfg.

The code is loaded much faster into the flash, and no errors occur during debugging.

3. OLIMEX ARM-USB-TINY-H should work up to 30Mhz according to the Olimex website:

http://www.olimex.com/dev/arm-usb-tiny-h.html

However, I received errors when the 30 MHz was setuped, and I was not able to flash, or debug.

Therefore the speed was set to 15 MHz in armflash.cfg as well as in armflash_debug.cfg:

“jtag_khz 15000”

4. The only one flash breakpoint can be added, because the one is added by the command:

“break main”

in the debugging script.

Only two flash breakpoints are available in ARM7 core.

I was not able to remove this one breakpoint at main during debugging.

Therefore, I commented this line and instead I added the breakpoint somewhere at the beginning of the code in ECLIPSE editor.

Then two breakpoints are ready to use.

[psemedo]

A big THANKS for the post mate!

I’ve being struggling with loading the simple “blinky” example into the Olimex sam7-p256 board for days.

After a whole weekend trying to make openOCD respond, I finally found that the openOCD instance that was installed by the Olimex installer was not working properly.

Changed the installation to the newest openOCD 0.4.0 (http://www.freddiechopin.info/index.php … /4-openocd) and it started responding. Unfortunately it didn’t respond the way I was hoping and I was faced with the same JTAG init errors you found.

After finding you post I made the changes to the olimex-arm-usb-tiny-h.cfg file and debug initialise commands and it work!!!

I’ve never been so happy to see two crappy LEDs flashing!

Thanks again

[afinko]

psemedo:
I’ve never been so happy to see two crappy LEDs flashing!

It is fine to know, that this post helped to someone

[s_t_e_f_a_n]

Afinko, great job i used your codes and they run super thanx

I have one question, how could i debugg programm in RAM? I recieve:

…

Loading section .text, size 0xa8c lma 0x200000

Start address 0x200040, load size 2700

Transfer rate: 106930 bits/sec, 337 bytes/write.

break main

Breakpoint 1 at 0x20030c: file src/main.c, line 27.

continue

But than nothing.

Thanks,

Stefan

[afinko]

s_t_e_f_a_n:
I have one question, how could i debug program in RAM?

Hi Stephan,

I was trying to modify the settings for debugging in RAM, but I did not finished it.

I do not need it now.

I will start working with this programmer very deeply in one month from now.

If you will find the settings earlier, pleas let us know and share your knowledge

Thanks.

Afi

[ernestw]

Hello All,

Here is my 0.4.0 OpenOCD .cfg file.

#daemon configuration

telnet_port 4444

gdb_port 3333

REFERENCE: http://www.olimex.com/dev/arm-usb-tiny.html

interface ft2232

ft2232_serial 0x03

ft2232_device_desc “Olimex OpenOCD JTAG ARM-USB-TINY-H”

ft2232_layout “olimex-jtag”

ft2232_vid_pid 0x15BA 0x002a

jtag_khz 500

LPC2888 Target related

if { [info exists CHIPNAME] } {

set _CHIPNAME $CHIPNAME

} else {

set _CHIPNAME lpc2888

}

if { [info exists ENDIAN] } {

set _ENDIAN $ENDIAN

} else {

set _ENDIAN little

}

#set _CPUTAPID 0x00000000

if { [info exists CPUTAPID ] } {

set _CPUTAPID $CPUTAPID

} else {

force an error till we get a good number

set _CPUTAPID 0x00000000

}

Define the _TARGETNAME

set _TARGETNAME [format “%s.cpu” $_CHIPNAME]

#use combined on interfaces or targets that can’t set TRST/SRST separately

reset_config trst_and_srst

jtag_ntrst_delay 200

jtag_nsrst_delay 200

#jtag scan chain

#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

#target arm7tdmi

target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME -endian little -variant arm7tdmi-s_r4

working_area 0 0x00400000 32768 nobackup

$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x0038000 -work-area-size 0x8000 -work-area-backup 0

flash bank lpc288x 0 0 0 0 $_TARGETNAME 12000000

scan_chain

jtag_reset 0 0

init

halt

#mww 0x80004060 1

#mww 0x80004064 1

#mww 0x80104018 130

#mww 0x80104008 1

#mww 0x80104004 6

#flash protect 0 0 21 off

#flash erase_sector 0 0 21

write elua to device

#flash write_bank 0 elua.bin 0

reset

shutdown

Unfortunately I cannot get OpenOCD to find the FTDI device. Debug info below

Debug: 82 27 ft2232.c:2023 ft2232_init_libftdi(): ‘ft2232’ interface using libftdi with ‘olimex-jtag’ layout (15ba:002a)

Error: 83 28 ft2232.c:2042 ft2232_init_libftdi(): unable to open ftdi device: device not found

Debug: 84 28 command.c:444 run_command(): Command failed with error code -100

User : 85 28 command.c:646 openocd_jim_vfprintf(): Runtime error, file “lpc2888.cfg”, line 59:

User : 86 28 command.c:646 openocd_jim_vfprintf():

I know VID & PID are right (used USBviewer to check).

I have tried a wide range of device_desc but nothing works.

I have issues getting FTDI certified drivers to load under Vista.

can you advise what drivers and OS you are working under?

Thanks,

Ernest

[Rockford]

The board I’m using is Olimex SAM7-P256 with the ARM-USB-TINY-H.

Is there any ‘officially recommended setup’ ?

I’m asking, because I’m writing an IDE (for Mac OS X 10.5), which I hope can include a script to set up everything needed, including tools for other microcontroller development.

Currently I’ve made scripts that compile the following:

- binutils-2.20.1 (with patches)

- gcc-4.2.3 (currently I can't go any higher than that)

- gdb-7.1

- libftdi-0.17

- newlib-1.18.0

- openocd-0.4.0

- libusb-0.1 (can't get libusb 1.0 to work with libftdi-1.18)

My question is, in other words: Can I avoid changing too much of the configuration files (to keep them as close to the originals as possible) ?

My goal is to get flashing to work from within a makefile.

I tried editing olimex-arm-usb-tiny-h.cfg to look like the following:

interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x002a
jtag_khz 15000
jtag_nsrst_delay 200
jtag_ntrst_delay 200

Then running the following command on the command-line:

openocd -f /usr/local/share/openocd/scripts/interface/olimex-arm-usb-tiny-h.cfg -f /usr/local/share/openocd/scripts/target/at91sam7sx.cfg --command "init" --command "exit"

I now got this output:

Open On-Chip Debugger 0.4.0 (2010-12-01-05:17)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.berlios.de/doc/doxygen/bugs.html
15000 kHz
jtag_nsrst_delay: 200
jtag_ntrst_delay: 200
srst_only srst_pulls_trst srst_gates_jtag srst_open_drain
Warn : use 'at91sam7s.cpu' as target identifier, not '0'
Info : max TCK change to: 30000 kHz
Info : clock speed 15000 kHz
Info : JTAG tap: at91sam7s.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)
Info : Embedded ICE version 1
Info : at91sam7s.cpu: hardware has 2 breakpoint/watchpoint units
make: *** [flash] Error 1
(note: echo "$?" shows that the exit code is 1)

In addition, if I try…

openocd -f /usr/local/share/openocd/scripts/interface/olimex-arm-usb-tiny-h.cfg -f /usr/local/share/openocd/scripts/target/at91sam7sx.cfg --command "flash write_bank 0 Example.bin 0x0" --command "init" --command "exit"

…I get this:

Warn : use 'at91sam7s.cpu' as target identifier, not '0'
flash write_bank 0 Example.bin 0x0: command requires more arguments
make: *** [flash] Error 1

I’m probably close now, but I still haven’t gotten flashing to work.

[ernestw]

Hello Rockford,

I really need to see the file “at91sam7sx.cfg”

You have errors with the Flash bank line.

Should be “flash bank myflashbankname 0 0 0 0 at91sam7s.cpu 12000000”

“myflashbankname” is some name (you give) for this particular flash bank.

12000000 should be the correct clock rate in Hz for the flash memory.

You should also have the following lines at the end of the last cfg. file

jtag_reset 0 0

init

halt

Now the JTAG reset command is not really necessary but does give feedback and a known starting point.

Leave the init and halt commands as your last lines. When you get these everything working to the point of the halt command then you can start to look at the specific instructions to flash the memory. At the moment OpenOCD is not working.

Now the command to run the OpenOCD should be

“OpenOCD -d3 -l mylogfile.log -f /usr/local/share/openocd/scripts/interface/olimex-arm-usb-tiny-h.cfg -f /usr/local/share/openocd/scripts/target/at91sam7sx.cfg”

For development it is probably easier to combine the .cfg into one file.

You may find the ft2232_device_desc description needs to be changed to match your device. If you are using Vista or Windows 7 you may have trouble with the device driver.

See my previous post - it may help.

Ernest

[Rockford]

ernestw:
I really need to see the file “at91sam7sx.cfg”

Thank you for your quick reply. I will do what you’re telling me to.

(I use Mac OS X, which is much closer to Linux than it is to Windows)

-Meanwhile here’s my at91sam7sx.cfg file (I didn’t modify this file at all):

#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME sam7x256
}

if { [info exists ENDIAN] } {
   set  _ENDIAN $ENDIAN
} else {
   set  _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x3f0f0f0f
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi

$_TARGETNAME configure -event reset-init {
	# disable watchdog
	mww 0xfffffd44 0x00008000
	# enable user reset
	mww 0xfffffd08 0xa5000001
	# CKGR_MOR : enable the main oscillator
	mww 0xfffffc20 0x00000601
	sleep 10
	# CKGR_PLLR: 96.1097 MHz
	mww 0xfffffc2c 0x00481c0e
	sleep 10
	# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
	mww 0xfffffc30 0x00000007
	sleep 10
	# MC_FMR: flash mode (FWS=1,FMCN=60)
	mww 0xffffff60 0x003c0100
	sleep 100
}

$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0

#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432

# For more information about the configuration files, take a look at:
# openocd.texi

The flash line differs quite a lot from what it should be then.

I believe this message…

flash write_bank 0 Example.bin 0x0: command requires more arguments

…most likely comes from one of the environment variables not being defined. I’ll try and find out which one.

[Rockford]

Hello Ernest,

ernestw:
When you get these everything working to the point of the halt command then you can start to look at the specific instructions to flash the memory. At the moment OpenOCD is not working.

I’m still messing around with it.

ernestw:
Unfortunately I cannot get OpenOCD to find the FTDI device

-Did you try compiling the FTDI driver yourself?

(I did, and mine seems to blink the LED on the arm-usb-tiny-h JTAG interface, so I think it finds the device)

Update: I just looked in the ‘mylogfile.log’ and looked for the first occurring error; here it is…

Debug: 112 11 command.c:133 script_debug(): command - ocd_flash ocd_flash bank at91sam7s.flash 0 0 0 0 at91sam7s.cpu 12000000
Error: 114 11 tcl.c:802 handle_flash_bank_command(): target '12000000' not defined

Progress:

Changed the flash line to read:

flash bank $_FLASHNAME at91sam7 0 0 0 0 at91sam7s.cpu 12000000

Removed jtag_reset 0 0, as OpenOCD complained about it had to be after the init.

Changed the halt to exit (as halt lets OpenOCD stay resident and it eats up my CPU time)

Got errors when using ‘exit’, so changed to shutdown, and finally I got a status code 0 (no errors)

Messed around a little more, found out that I need the ‘halt’, as the log said “target not halted”, so I added the ‘halt’ back in before the shutdown.

Tried changing the flash line to read:

flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432

This also seems to produce a ‘no error’ code.

More progress… Found out I don’t need absolute paths, but paths relative to the scripts directory seems necessary:

openocd -d3 -l mylogfile.log -f interface/olimex-arm-usb-tiny-h.cfg -f target/at91sam7sx.cfg --command "init" --command "halt" --command "shutdown"
```(until now, both at91sam7sx.cfg and sam7x256.cfg gives me a successful exit; without any modifications)

I tried copying and pasting afinko's .cfg above again, but I get the following:

Error: status register: 0x30005
Error: Lock Error Bit Detected, Operation Abort
Error: error writing to flash at address 0x00100000 at offset 0x00000000 (-902)

(details from logfile:)

Debug: 479 2071 target.c:1488 target_read_u32(): address: 0xffffff68, value: 0x00030005
Debug: 480 2071 at91sam7.c:238 at91sam7_wait_status_busy(): status[0]: 0x30005
Error: 481 2071 at91sam7.c:242 at91sam7_wait_status_busy(): status register: 0x30005
Error: 482 2071 at91sam7.c:244 at91sam7_wait_status_busy(): Lock Error Bit Detected, Operation Abort
Error: 483 2071 core.c:76 flash_driver_write(): error writing to flash at address 0x00100000 at offset 0x00000000 (-902)
Debug: 484 2071 command.c:620 run_command(): Command failed with error code -902

I searched the net and found [[this thread](http://embdev.net/topic/129413). I think the key here is the line:

flash protect 0 0 1 off

Which I placed right here...

arm7_9 fast_memory_access enable
flash protect 0 0 1 off
wait_halt

...so I got the following:

…
Warn : srst pulls trst - can not reset into halted mode. Issuing halt after reset.
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x8000005f pc: 0x001021e8
dcc downloads are enabled
fast memory access is enabled
cleared protection for sectors 0 through 1 on flash bank 0
flash ‘at91sam7’ found at 0x00100000
wrote 488 bytes from file main.bin to flash bank 0 at offset 0x00000000 in 0.042289s (11.269 kb/s)
shutdown command invoked

Seems something has changed. The mouse-driver which the board ships with no longer works. That's an indication that I wrote something to the flash. :)

-Why my LED does not flash is probably because I made a mistake in my code; but I believe I'm on the right track.

Sorry for the long post. I'll keep most of it here, in case other people find themselves stuck with one of my problems.

And when looking at the cfg from afinko, clearly it shows the line I just added, 5 lines later! =D](http://embdev.net/topic/129413)

[Rockford]

Oke, now I got some LEDs to blink.

It seems that the stuff I get to compile (without errors) does not do anything useful.

But I managed to flash the SAM7_Pxxx_led.bin file from Olimex’s site…

Go to their [development site, click ARM, click SAM7-P256, download the [SAM7-P256 blinking LED project, extract and flash the binary file.

I used a mixture between afinko’s configuration file and sam7x256.cfg. Here it is, I call it sam7-p256.cfg and currently it resides right next to my sources and Makefile:

#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME sam7x256
}

if { [info exists ENDIAN] } {
   set  _ENDIAN $ENDIAN
} else {
   set  _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x3f0f0f0f
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi

$_TARGETNAME configure -event reset-init {
	# disable watchdog
	mww 0xfffffd44 0x00008000
	# enable user reset
	mww 0xfffffd08 0xa5000001
	# CKGR_MOR : enable the main oscillator
	mww 0xfffffc20 0x00000601
	sleep 10
	# CKGR_PLLR: 96.1097 MHz
	mww 0xfffffc2c 0x00481c0e
	sleep 10
	# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
	mww 0xfffffc30 0x00000007
	sleep 10
	# MC_FMR: flash mode (FWS=1,FMCN=60)
	mww 0xffffff60 0x003c0100
	sleep 100

	wait_halt
	flash probe 0
}

$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0

#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432

# For more information about the configuration files, take a look at:
# openocd.texi

init
reset init

First, the chip has to be unlocked, as it’s locked when you receive it:

openocd -f interface/olimex-arm-usb-tiny-h.cfg -f sam7-p256.cfg --command "flash protect 0 0 1 off" --command "mww 0xfffffd08 0xa5000401" --command "resume" --command "shutdown"

I then flash using this command:

openocd -f interface/olimex-arm-usb-tiny-h.cfg -f sam7-p256.cfg --command "flash write_bank 0 SAM7_Pxxx_led.bin 0x0" --command "mww 0xfffffd08 0xa5000401" --command "resume" --command "shutdown"

I may not do things ‘by the book’, but it worked for me so far, and I can control from the Makefile what to do. Hopefully this will all be improved (both by me and by others).

So far, thank you everyone for all the help. My next step is to figure out how to actually make my own ‘blink-a-LED’ code! If I succeed, I will make it so simple that it will probably compile on most systems; eg. I won’t be initializing timers, communicating via RS232, sending rockets to the sky, making floating-point calculations on the space-shuttle wings, etc…; just blink a single LED. Sounds awesome, eh? ;)](http://www.olimex.com/dev/soft/arm/SAM7/SAM7-P256-blinking-LED.zip)](Products)

[ernestw]

Hello Rockford,

Congratulations! Most of what you did makes sense!

I have found my problem with the drivers is related to Vista OS. It seems the Windows Vista and windows 7 64-bit OS systems cause a lot of problems with drivers for new hardware.

Unfortunately for other reasons I started this project in Vista, not Ubuntu as is my preference. So I am in the process of moving all my tools and project over to Ubuntu and a Win-32 system.

I am not familiar with the SAM7-P256 chip, but a few comments…

I see in your .cfg files

#flash bank <base_addr> <chip_width> <bus_width> <target_number> [<target_name> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]

set _FLASHNAME $_CHIPNAME.flash

flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432

I think there are a few errors…

The arguments seem to be slightly different to the flash bank command I read about. I am pretty certain 0 is used to specify a default value for the args.

Aligning the arguments I get

#flash bank <base_addr> <chip_width> <bus_width> <target_number> [<target_name> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]

flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432

is at91sam7 defined as the flash bank base addr? “flash ‘at91sam7’ found at 0x00100000” Is this the correct addr? And what of the two extra 0 0? 18432 is ext freq?

Should have warned you about the flash lock. Do you know if the lock is for the full bank, or a range of sectors? You ready should know exactly what part of the flash memory you are opening up.

Do you know if the SAM7-P256 chip stores any critical code in the flash bank? You should work out the memory map, locating all the code first. Often development boards have programs loaded into parts of RAM or Flash memory. This code/data is usually loaded from the lowest available blocks/sectors. When you first start to load your own code it is better to pick a couple of higher blocks/sectors near the upper end so you do not overwrite any code. Sometimes you have no choice.

cleared protection for sectors 0 through 1 on flash bank 0

flash ‘at91sam7’ found at 0x00100000

It looks like you unlock sectors 0 through 1

The other thing you should always do is immediately lock up the flash after you have written your code. Do this before you run anything! Otherwise some bad code can trash the lot!

I tend to not try to write to flash until I am sure I have all the args and variables correct. So I

1. comment out the nasty write operations and then check all the debug log carefully before trying to write.

2. It is better to get the memory dump commands working first

3. confirm where code/data is in memory (before loading your own code)

4. Just write a small amount of “do nothing” code. But do not run it.

5. Use memory dump to confirm you are writing the right code into the right memory locations.

6. Then run the code (which does the minimal amount of changes to prove it runs, i.e. changes one safe memory location).

7. Use debug and memory dump to confirm works as planned.

8. Then progressively increase code from there - blinking LEDS, etc.

Hope this helps.

Ernest

[ernestw]

Hello again,

I went and RTFM http://openocd.berlios.de/doc/html/Flash-Commands.html

12.1 Flash Configuration Commands

— Config Command: flash bank name driver base size chip_width bus_width target [driver_options]

Configures a flash bank which provides persistent storage for addresses from base to base + size - 1. These banks will often be visible to GDB through the target’s memory map. In some cases, configuring a flash bank will activate extra commands; see the driver-specific documentation.

• name … may be used to reference the flash bank in other flash commands. A number is also available.

• driver … identifies the controller driver associated with the flash bank being declared. This is usually cfi for external flash, or else the name of a microcontroller with embedded flash memory. See Flash Driver List.

• base … Base address of the flash chip.

• size … Size of the chip, in bytes. For some drivers, this value is detected from the hardware.

• chip_width … Width of the flash chip, in bytes; ignored for most microcontroller drivers.

• bus_width … Width of the data bus used to access the chip, in bytes; ignored for most microcontroller drivers.

• target … Names the target used to issue commands to the flash controller.

• driver_options … drivers may support, or require, additional parameters. See the driver-specific documentation for more information.

Note: This command is not available after OpenOCD initialization has completed. Use it in board specific configuration files, not interactively.

Config Command: flash bank name driver base size chip_width bus_width target [driver_options]

So should be (if I have read correctly)

flash bank $_FLASHNAME at91sam7 0x??? 0x8000 32 32 $_TARGETNAME 0 0 0 0 0 18432

where

at91sam7 is the driver s/ware; you need to supply base addr and size (0x8000 should work); SAM7 is 32 bit chip

Ernest

[ernestw]

Here are the options for this driver.

Flash Driver: at91sam7

All members of the AT91SAM7 microcontroller family from Atmel include internal flash and use ARM7TDMI cores. The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself.

flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME

For chips which are not recognized by the controller driver, you must provide additional parameters in the following order:

• chip_model … label used with flash info

• banks

• sectors_per_bank

• pages_per_sector

• pages_size

• num_nvm_bits

• freq_khz … required if an external clock is provided, optional (but recommended) when the oscillator frequency is known

It is recommended that you provide zeroes for all of those values except the clock frequency, so that everything except that frequency will be autoconfigured. Knowing the frequency helps ensure correct timings for flash access.

The flash controller handles erases automatically on a page (128/256 byte) basis, so explicit erase commands are not necessary for flash programming. However, there is an “EraseAll“ command that can erase an entire flash plane (of up to 256KB), and it will be used automatically when you issue flash erase_sector or flash erase_address commands.

— Command: at91sam7 gpnvm bitnum (set|clear)

Set or clear a “General Purpose Non-Volatile Memory” (GPNVM) bit for the processor. Each processor has a number of such bits, used for controlling features such as brownout detection (so they are not truly general purpose).

Note: This assumes that the first flash bank (number 0) is associated with the appropriate at91sam7 target.

Ernest

[rodi07]

Hi,

After a long time, I have loaded my program via ARM-USB-TINY-H on the

SAM7-EX256 Board (Flash). But I do not know, how to start the program from Flash?

I use a startup-program from a sample Project “olimex_sam7_ex256_startup_minimal” . I think this Program is used to start from SRAM. And I must start from Flash.

The second Problem is. I can Not Debug my Program, I set the OpenOCD according this manual:

http://carrierwave.wordpress.com/2009/0 … debugging/

Thanks in advance.

Rodi

[rodi07]

Hi,

After a long time, I have loaded my program via ARM-USB-TINY-H on the

SAM7-EX256 Board (Flash). But I do not know, how to start the program from Flash?

I use a startup-program from a sample Project “olimex_sam7_ex256_startup_minimal” . I think this Program is used to start from SRAM. And I must start from Flash.

The second Problem is. I can Not Debug my Program, I set the OpenOCD according this manual:

http://carrierwave.wordpress.com/2009/0 … debugging/

Thanks in advance.

Rodi