I’ve got an ARM7-based Atmel CPU (an AT91SAM7X256) that I am trying to get to work with the OpenOCD 0.4.0 release. It works fine with the 0.1.0 release. I’ve heard 0.3.1 also works. When openocd gets to this command:
flash write_image erase my.bin 0x100000 bin
it gets into a loop that goes on forever (starting around debug line 447 below) and is accessing a very odd memory region (0xffffff68, etc). I don’t understand this at all. I’ve included the -d3 output and my config scripts below.
My configs:
my flashing script:
source [find interface/signalyzer.cfg]
ft2232_device_desc “Signalyzer”
Change the default telnet port…
telnet_port 4444
GDB connects here
gdb_port 3333
GDB can also flash my flash!
gdb_memory_map enable
gdb_flash_program enable
source [find target/sam7x256.cfg]
source “my_ocd.cfg”
jtag_khz 5
init
reset halt
flash write_image erase combo.bin 0x100000 bin # program the onchip flash
verify_image combo.bin 0x100000 bin
at91sam7 gpnvm 0 0 set
at91sam7 gpnvm 0 1 set
at91sam7 gpnvm 0 2 set
shutdown
#exit
my_ocd.cfg:
$_TARGETNAME configure -event halted {
wait_halt
armv4_5 core_state arm
mww 0xfffffc30 0x0 # run config off internal slow clock …
sleep 100
mww 0xffffff60 0x00270000 # set flash wait state (AT91C_MC_FMR)
mww 0xfffffd44 0xa0008000 # watchdog disable (AT91C_WDTC_WDMR)
force oscillator on
PIO enable and output enable …
mww 0xFFFFF600 0x300000 # PER
mww 0xFFFFF610 0x300000 # OER
mww 0xFFFFF630 0x300000 # PIOB SODR - osc. enable. + KEEPALIVE
sleep 1 # sleep for oscillator
mww 0xfffffc20 0x2 # bypass main oscillator (AT91C_PMC_MOR)
mww 0xfffffc30 0x1 # set master clock to external
sleep 100 # sleep 100 ms
mww 0xfffffd08 0xa5000401 # enable user reset AT91C_RSTC_RMR
now in fast clock
jtag_khz 4300
}
openocd.cfg (default):
source [find interface/signalyzer.cfg]
Change the default telnet port…
telnet_port 4444
GDB connects here
gdb_port 3333
GDB can also flash my flash!
gdb_memory_map enable
gdb_flash_program enable
source [find target/sam7x256.cfg]
source “my_ocd.cfg”
jtag_khz 5
Debug output:
Open On-Chip Debugger 0.4.0 (2010-06-29-11:19)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
User : 10 1 command.c:539 command_print(): debug_level: 3
Debug: 11 1 configuration.c:45 add_script_search_dir(): adding /home/nfrench/.openocd
Debug: 12 1 configuration.c:45 add_script_search_dir(): adding /usr/local/share/openocd/site
Debug: 13 1 configuration.c:45 add_script_search_dir(): adding /usr/local/share/openocd/scripts
Debug: 14 1 configuration.c:87 find_file(): found ./openocd_flash.cfg
Debug: 15 2 configuration.c:87 find_file(): found /home/nfrench/dev/node/openocd/openocd-0.4.0/tcl//interface/signalyzer.cfg
Debug: 16 2 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_interface ft2232
Debug: 17 2 command.c:133 script_debug(): command - interface ocd_interface ft2232
Debug: 19 2 command.c:346 register_command_handler(): registering ‘ocd_ft2232_device_desc’…
Debug: 20 2 command.c:346 register_command_handler(): registering ‘ocd_ft2232_serial’…
Debug: 21 2 command.c:346 register_command_handler(): registering ‘ocd_ft2232_layout’…
Debug: 22 2 command.c:346 register_command_handler(): registering ‘ocd_ft2232_vid_pid’…
Debug: 23 2 command.c:346 register_command_handler(): registering ‘ocd_ft2232_latency’…
Debug: 24 2 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_ft2232_device_desc Signalyzer
Debug: 25 2 command.c:133 script_debug(): command - ft2232_device_desc ocd_ft2232_device_desc Signalyzer
Debug: 27 2 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_ft2232_layout signalyzer
Debug: 28 3 command.c:133 script_debug(): command - ft2232_layout ocd_ft2232_layout signalyzer
Debug: 30 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_ft2232_vid_pid 0x0403 0xbca0
Debug: 31 3 command.c:133 script_debug(): command - ft2232_vid_pid ocd_ft2232_vid_pid 0x0403 0xbca0
Debug: 33 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_ft2232_device_desc Signalyzer
Debug: 34 3 command.c:133 script_debug(): command - ft2232_device_desc ocd_ft2232_device_desc Signalyzer
Debug: 36 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_telnet_port 4444
Debug: 37 3 command.c:133 script_debug(): command - telnet_port ocd_telnet_port 4444
Debug: 39 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_gdb_port 3333
Debug: 40 3 command.c:133 script_debug(): command - gdb_port ocd_gdb_port 3333
Debug: 42 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_gdb_memory_map enable
Debug: 43 3 command.c:133 script_debug(): command - gdb_memory_map ocd_gdb_memory_map enable
Debug: 45 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_gdb_flash_program enable
Debug: 46 3 command.c:133 script_debug(): command - gdb_flash_program ocd_gdb_flash_program enable
Debug: 48 3 configuration.c:87 find_file(): found /home/nfrench/dev/node/openocd/openocd-0.4.0/tcl//target/sam7x256.cfg
Debug: 49 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_only srst_pulls_trst
Debug: 50 3 command.c:133 script_debug(): command - reset_config ocd_reset_config srst_only srst_pulls_trst
User : 52 3 command.c:539 command_print(): srst_only srst_pulls_trst srst_gates_jtag srst_open_drain
Debug: 53 4 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag newtap sam7x256 cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f
Debug: 54 4 command.c:133 script_debug(): command - ocd_jtag ocd_jtag newtap sam7x256 cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f
Debug: 55 4 tcl.c:568 jim_newtap_cmd(): Creating New Tap, Chip: sam7x256, Tap: cpu, Dotted: sam7x256.cpu, 8 params
Debug: 56 4 tcl.c:585 jim_newtap_cmd(): Processing option: -irlen
Debug: 57 4 tcl.c:585 jim_newtap_cmd(): Processing option: -ircapture
Debug: 58 4 tcl.c:585 jim_newtap_cmd(): Processing option: -irmask
Debug: 59 4 tcl.c:585 jim_newtap_cmd(): Processing option: -expected-id
Debug: 60 4 core.c:1300 jtag_tap_init(): Created Tap: sam7x256.cpu @ abs position 0, irlen 4, capture: 0x1 mask: 0xf
Debug: 61 4 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_target create sam7x256.cpu arm7tdmi -endian little -chain-position sam7x256.cpu -variant arm7tdmi
Debug: 62 4 command.c:133 script_debug(): command - ocd_target ocd_target create sam7x256.cpu arm7tdmi -endian little -chain-position sam7x256.cpu -variant arm7tdmi
Debug: 63 4 command.c:346 register_command_handler(): registering ‘ocd_arm’…
Debug: 64 4 command.c:346 register_command_handler(): registering ‘ocd_arm’…
Debug: 65 4 command.c:346 register_command_handler(): registering ‘ocd_arm’…
Debug: 66 4 command.c:346 register_command_handler(): registering ‘ocd_arm’…
Debug: 67 4 command.c:346 register_command_handler(): registering ‘ocd_arm’…
Debug: 68 4 command.c:346 register_command_handler(): registering ‘ocd_etm’…
Debug: 69 4 command.c:346 register_command_handler(): registering ‘ocd_arm7_9’…
Debug: 70 4 command.c:346 register_command_handler(): registering ‘ocd_arm7_9’…
Debug: 71 4 command.c:346 register_command_handler(): registering ‘ocd_arm7_9’…
Debug: 72 4 command.c:346 register_command_handler(): registering ‘ocd_arm7_9’…
Debug: 73 4 armv4_5.c:397 arm_set_cpsr(): set CPSR 0x00000010: User mode, ARM state
Debug: 74 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 75 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 76 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 77 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 78 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 79 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 80 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 81 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 82 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 83 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 84 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 85 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 86 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 87 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 88 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 89 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 90 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 91 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 92 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 93 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 94 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 95 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 96 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 97 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 98 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 99 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 100 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 101 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 102 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 103 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 104 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 105 4 command.c:346 register_command_handler(): registering ‘ocd_sam7x256.cpu’…
Debug: 106 13 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu configure -event reset-init
disable watchdog
mww 0xfffffd44 0x00008000
enable user reset
mww 0xfffffd08 0xa5000001
CKGR_MOR : enable the main oscillator
mww 0xfffffc20 0x00000601
sleep 10
CKGR_PLLR: 96.1097 MHz
mww 0xfffffc2c 0x00481c0e
sleep 10
PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
mww 0xfffffc30 0x00000007
sleep 10
MC_FMR: flash mode (FWS=1,FMCN=60)
mww 0xffffff60 0x003c0100
sleep 100
Debug: 107 13 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu configure -event reset-init
disable watchdog
mww 0xfffffd44 0x00008000
enable user reset
mww 0xfffffd08 0xa5000001
CKGR_MOR : enable the main oscillator
mww 0xfffffc20 0x00000601
sleep 10
CKGR_PLLR: 96.1097 MHz
mww 0xfffffc2c 0x00481c0e
sleep 10
PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
mww 0xfffffc30 0x00000007
sleep 10
MC_FMR: flash mode (FWS=1,FMCN=60)
mww 0xffffff60 0x003c0100
sleep 100
Debug: 108 13 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
Debug: 109 13 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
Debug: 110 14 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_flash bank sam7x256.flash at91sam7 0 0 0 0 sam7x256.cpu 0 0 0 0 0 0 0 18432
Debug: 111 14 command.c:133 script_debug(): command - ocd_flash ocd_flash bank sam7x256.flash at91sam7 0 0 0 0 sam7x256.cpu 0 0 0 0 0 0 0 18432
Debug: 113 14 command.c:346 register_command_handler(): registering ‘ocd_at91sam7’…
Debug: 114 14 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu configure -event halted
wait_halt
armv4_5 core_state arm
mww 0xfffffc30 0x0 # run config off internal slow clock …
sleep 100
mww 0xffffff60 0x00270000 # set flash wait state (AT91C_MC_FMR)
mww 0xfffffd44 0xa0008000 # watchdog disable (AT91C_WDTC_WDMR)
force oscillator on
PIO enable and output enable …
mww 0xFFFFF600 0x300000 # PER
mww 0xFFFFF610 0x300000 # OER
mww 0xFFFFF630 0x300000 # PIOB SODR - osc. enable. + KEEPALIVE
sleep 1 # sleep for oscillator
mww 0xfffffc20 0x2 # bypass main oscillator (AT91C_PMC_MOR)
mww 0xfffffc30 0x1 # set master clock to external
sleep 100 # sleep 100 ms
mww 0xfffffd08 0xa5000401 # enable user reset AT91C_RSTC_RMR
now in fast clock
jtag_khz 4300
Debug: 115 14 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu configure -event halted
wait_halt
armv4_5 core_state arm
mww 0xfffffc30 0x0 # run config off internal slow clock …
sleep 100
mww 0xffffff60 0x00270000 # set flash wait state (AT91C_MC_FMR)
mww 0xfffffd44 0xa0008000 # watchdog disable (AT91C_WDTC_WDMR)
force oscillator on
PIO enable and output enable …
mww 0xFFFFF600 0x300000 # PER
mww 0xFFFFF610 0x300000 # OER
mww 0xFFFFF630 0x300000 # PIOB SODR - osc. enable. + KEEPALIVE
sleep 1 # sleep for oscillator
mww 0xfffffc20 0x2 # bypass main oscillator (AT91C_PMC_MOR)
mww 0xfffffc30 0x1 # set master clock to external
sleep 100 # sleep 100 ms
mww 0xfffffd08 0xa5000401 # enable user reset AT91C_RSTC_RMR
now in fast clock
jtag_khz 4300
Debug: 116 14 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag_khz 5
Debug: 117 14 command.c:133 script_debug(): command - jtag_khz ocd_jtag_khz 5
Debug: 119 14 core.c:1560 jtag_config_khz(): handle jtag khz
Debug: 120 14 core.c:1523 jtag_khz_to_speed(): convert khz to interface specific speed value
User : 121 14 command.c:539 command_print(): 5 kHz
Debug: 122 14 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 123 14 command.c:133 script_debug(): command - init ocd_init
Debug: 125 14 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_target init
Debug: 126 14 command.c:133 script_debug(): command - ocd_target ocd_target init
Debug: 128 14 target.c:835 handle_target_init_command(): Initializing targets…
Debug: 129 14 command.c:346 register_command_handler(): registering ‘ocd_target_request’…
Debug: 130 14 command.c:346 register_command_handler(): registering ‘ocd_trace’…
Debug: 131 14 command.c:346 register_command_handler(): registering ‘ocd_trace’…
Debug: 132 14 command.c:346 register_command_handler(): registering ‘ocd_fast_load_image’…
Debug: 133 14 command.c:346 register_command_handler(): registering ‘ocd_fast_load’…
Debug: 134 14 command.c:346 register_command_handler(): registering ‘ocd_profile’…
Debug: 135 14 command.c:346 register_command_handler(): registering ‘ocd_virt2phys’…
Debug: 136 14 command.c:346 register_command_handler(): registering ‘ocd_reg’…
Debug: 137 14 command.c:346 register_command_handler(): registering ‘ocd_poll’…
Debug: 138 14 command.c:346 register_command_handler(): registering ‘ocd_wait_halt’…
Debug: 139 14 command.c:346 register_command_handler(): registering ‘ocd_halt’…
Debug: 140 14 command.c:346 register_command_handler(): registering ‘ocd_resume’…
Debug: 141 14 command.c:346 register_command_handler(): registering ‘ocd_reset’…
Debug: 142 14 command.c:346 register_command_handler(): registering ‘ocd_soft_reset_halt’…
Debug: 143 14 command.c:346 register_command_handler(): registering ‘ocd_step’…
Debug: 144 14 command.c:346 register_command_handler(): registering ‘ocd_mdw’…
Debug: 145 15 command.c:346 register_command_handler(): registering ‘ocd_mdh’…
Debug: 146 15 command.c:346 register_command_handler(): registering ‘ocd_mdb’…
Debug: 147 15 command.c:346 register_command_handler(): registering ‘ocd_mww’…
Debug: 148 15 command.c:346 register_command_handler(): registering ‘ocd_mwh’…
Debug: 149 15 command.c:346 register_command_handler(): registering ‘ocd_mwb’…
Debug: 150 15 command.c:346 register_command_handler(): registering ‘ocd_bp’…
Debug: 151 15 command.c:346 register_command_handler(): registering ‘ocd_rbp’…
Debug: 152 15 command.c:346 register_command_handler(): registering ‘ocd_wp’…
Debug: 153 15 command.c:346 register_command_handler(): registering ‘ocd_rwp’…
Debug: 154 15 command.c:346 register_command_handler(): registering ‘ocd_load_image’…
Debug: 155 15 command.c:346 register_command_handler(): registering ‘ocd_dump_image’…
Debug: 156 15 command.c:346 register_command_handler(): registering ‘ocd_verify_image’…
Debug: 157 15 command.c:346 register_command_handler(): registering ‘ocd_test_image’…
Debug: 158 15 command.c:346 register_command_handler(): registering ‘ocd_reset_nag’…
Debug: 159 15 ft2232.c:2097 ft2232_init(): ft2232 interface using shortest path jtag state transitions
Debug: 160 15 ft2232.c:2011 ft2232_init_libftdi(): ‘ft2232’ interface using libftdi with ‘signalyzer’ layout (0403:bca0)
Debug: 161 216 ft2232.c:2055 ft2232_init_libftdi(): current latency timer: 2
Debug: 162 217 ft2232.c:2066 ft2232_init_libftdi(): FTDI chip type: 2 “2232C”
Debug: 163 217 ft2232.c:2268 usbjtag_init(): 80 18 1b
Debug: 164 218 core.c:1523 jtag_khz_to_speed(): convert khz to interface specific speed value
Debug: 165 218 core.c:1527 jtag_khz_to_speed(): have interface set up
Debug: 166 218 ft2232.c:523 ft2232_speed(): 86 af 04
Debug: 167 222 core.c:1523 jtag_khz_to_speed(): convert khz to interface specific speed value
Debug: 168 222 core.c:1527 jtag_khz_to_speed(): have interface set up
Info : 169 222 core.c:1350 jtag_interface_init(): clock speed 5 kHz
Debug: 170 222 openocd.c:122 handle_init_command(): jtag interface init complete
Debug: 171 222 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag init
Debug: 172 223 command.c:133 script_debug(): command - ocd_jtag ocd_jtag init
Debug: 174 223 tcl.c:854 handle_jtag_init_command(): Initializing jtag devices…
Debug: 175 223 core.c:672 jtag_add_reset(): SRST line released
Debug: 176 223 core.c:697 jtag_add_reset(): TRST line released
Debug: 177 223 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 178 223 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init
Debug: 179 223 command.c:133 script_debug(): command - ocd_jtag ocd_jtag arp_init
Debug: 180 223 core.c:1364 jtag_init_inner(): Init JTAG chain
Debug: 181 223 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 182 224 core.c:1017 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 183 224 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 184 355 core.c:917 jtag_examine_chain_display(): JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)
Debug: 185 355 core.c:1182 jtag_validate_ircapture(): IR capture validation scan
Debug: 186 359 core.c:1243 jtag_validate_ircapture(): sam7x256.cpu: IR capture 0x01
Debug: 187 360 openocd.c:132 handle_init_command(): Examining targets…
Info : 188 383 embeddedice.c:229 embeddedice_build_reg_cache(): Embedded ICE version 1
Info : 189 383 embeddedice.c:301 embeddedice_build_reg_cache(): sam7x256.cpu: hardware has 2 breakpoint/watchpoint units
Debug: 190 383 arm7_9_common.c:75 arm7_9_clear_watchpoints(): -
Debug: 191 383 embeddedice.c:497 embeddedice_write_reg(): 12: 0x00000000
Debug: 192 383 embeddedice.c:497 embeddedice_write_reg(): 20: 0x00000000
Debug: 193 384 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_flash init
Debug: 194 384 command.c:133 script_debug(): command - ocd_flash ocd_flash init
Debug: 195 419 arm7_9_common.c:890 arm7_9_poll(): DBGACK already set during server startup.
Debug: 196 420 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 197 420 embeddedice.c:497 embeddedice_write_reg(): 12: 0x00000000
Debug: 198 453 arm7_9_common.c:1397 arm7_9_debug_entry(): target entered debug from ARM state
Debug: 199 668 armv4_5.c:397 arm_set_cpsr(): set CPSR 0x00000092: IRQ mode, ARM state
Debug: 200 668 arm7_9_common.c:1425 arm7_9_debug_entry(): target entered debug state in IRQ mode
Debug: 201 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r0: 0x00000092
Debug: 202 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r1: 0xffffffff
Debug: 203 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r2: 0xffffffff
Debug: 204 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r3: 0xffffffff
Debug: 205 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r4: 0xffffffff
Debug: 206 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r5: 0xffffffff
Debug: 207 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r6: 0xffffffff
Debug: 208 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r7: 0xffffffff
Debug: 209 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r8: 0xffffffff
Debug: 210 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r9: 0xffffffff
Debug: 211 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r10: 0xffffffff
Debug: 212 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r11: 0xffffffff
Debug: 213 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r12: 0xffffffff
Debug: 214 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r13: 0xffffffff
Debug: 215 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r14: 0xffffffff
Debug: 216 668 arm7_9_common.c:1447 arm7_9_debug_entry(): r15: 0x000003f8
Debug: 217 668 arm7_9_common.c:1455 arm7_9_debug_entry(): entered debug state at PC 0x3f8
Debug: 218 711 target.c:968 target_call_event_callbacks(): target event 2 (gdb-halt)
Debug: 219 711 target.c:968 target_call_event_callbacks(): target event 3 (halted)
Debug: 220 711 target.c:3489 target_handle_event(): target: (0) sam7x256.cpu (arm7tdmi) event: 3 (halted) action:
wait_halt
armv4_5 core_state arm
mww 0xfffffc30 0x0 # run config off internal slow clock …
sleep 100
mww 0xffffff60 0x00270000 # set flash wait state (AT91C_MC_FMR)
mww 0xfffffd44 0xa0008000 # watchdog disable (AT91C_WDTC_WDMR)
force oscillator on
PIO enable and output enable …
mww 0xFFFFF600 0x300000 # PER
mww 0xFFFFF610 0x300000 # OER
mww 0xFFFFF630 0x300000 # PIOB SODR - osc. enable. + KEEPALIVE
sleep 1 # sleep for oscillator
mww 0xfffffc20 0x2 # bypass main oscillator (AT91C_PMC_MOR)
mww 0xfffffc30 0x1 # set master clock to external
sleep 100 # sleep 100 ms
mww 0xfffffd08 0xa5000401 # enable user reset AT91C_RSTC_RMR
now in fast clock
jtag_khz 4300
Debug: 221 711 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_wait_halt
Debug: 222 712 command.c:133 script_debug(): command - wait_halt ocd_wait_halt
Error: 225 737 command.c:589 run_command(): The ‘wait_halt’ command must be used after ‘init’.
User : 226 738 command.c:824 openocd_jim_vfprintf(): Command handler execution failed
User : 228 738 command.c:824 openocd_jim_vfprintf():
User : 230 738 command.c:824 openocd_jim_vfprintf():
Debug: 232 738 tcl.c:920 handle_flash_init_command(): Initializing flash devices…
Debug: 233 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 234 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 235 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 236 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 237 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 238 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 239 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 240 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 241 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 242 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 243 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 244 738 command.c:346 register_command_handler(): registering ‘ocd_flash’…
Debug: 245 738 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_mflash init
Debug: 246 738 command.c:133 script_debug(): command - ocd_mflash ocd_mflash init
Debug: 248 757 mflash.c:1325 handle_mflash_init_command(): Initializing mflash devices…
Debug: 249 757 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_nand init
Debug: 250 757 command.c:133 script_debug(): command - ocd_nand ocd_nand init
Debug: 252 775 tcl.c:536 handle_nand_init_command(): Initializing NAND devices…
Debug: 253 775 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_pld init
Debug: 254 775 command.c:133 script_debug(): command - ocd_pld ocd_pld init
Debug: 256 794 pld.c:231 handle_pld_init_command(): Initializing PLDs…
Debug: 257 794 gdb_server.c:2370 gdb_target_start(): gdb service for target ‘sam7x256.cpu’ on TCP port 3333
Debug: 258 794 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_reset halt
Debug: 259 794 command.c:133 script_debug(): command - reset ocd_reset halt
Debug: 261 813 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 262 814 command.c:133 script_debug(): command - ocd_target ocd_target names
Debug: 263 814 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu invoke-event reset-start
Debug: 264 814 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu invoke-event reset-start
Debug: 265 814 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init-reset
Debug: 266 814 command.c:133 script_debug(): command - ocd_jtag ocd_jtag arp_init-reset
Debug: 267 814 core.c:1451 jtag_init_reset(): Initializing with hard TRST+SRST reset
Debug: 268 814 core.c:685 jtag_add_reset(): JTAG reset with TLR instead of TRST
Debug: 269 814 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 270 815 core.c:667 jtag_add_reset(): SRST line asserted
Debug: 271 815 core.c:685 jtag_add_reset(): JTAG reset with TLR instead of TRST
Debug: 272 815 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 273 816 core.c:672 jtag_add_reset(): SRST line released
Debug: 274 816 core.c:1364 jtag_init_inner(): Init JTAG chain
Debug: 275 816 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 276 817 core.c:1017 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 277 817 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 278 948 core.c:917 jtag_examine_chain_display(): JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)
Debug: 279 948 core.c:1182 jtag_validate_ircapture(): IR capture validation scan
Debug: 280 953 core.c:1243 jtag_validate_ircapture(): sam7x256.cpu: IR capture 0x01
Debug: 281 953 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu cget -chain-position
Debug: 282 953 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu cget -chain-position
Debug: 283 953 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled sam7x256.cpu
Debug: 284 953 command.c:133 script_debug(): command - ocd_jtag ocd_jtag tapisenabled sam7x256.cpu
Debug: 285 953 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu arp_examine
Debug: 286 954 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu arp_examine
Debug: 287 954 arm7_9_common.c:75 arm7_9_clear_watchpoints(): -
Debug: 288 954 embeddedice.c:497 embeddedice_write_reg(): 12: 0x00000000
Debug: 289 954 embeddedice.c:497 embeddedice_write_reg(): 20: 0x00000000
Debug: 290 954 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu invoke-event reset-assert-pre
Debug: 291 954 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu invoke-event reset-assert-pre
Debug: 292 954 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu cget -chain-position
Debug: 293 954 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu cget -chain-position
Debug: 294 954 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled sam7x256.cpu
Debug: 295 954 command.c:133 script_debug(): command - ocd_jtag ocd_jtag tapisenabled sam7x256.cpu
Debug: 296 955 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu arp_reset assert 1
Debug: 297 955 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu arp_reset assert 1
Debug: 298 955 arm7_9_common.c:950 arm7_9_assert_reset(): target->state: halted
Debug: 299 955 embeddedice.c:497 embeddedice_write_reg(): 8: 0x00000000
Debug: 300 955 embeddedice.c:497 embeddedice_write_reg(): 9: 0x00000003
Debug: 301 955 embeddedice.c:497 embeddedice_write_reg(): 11: 0xffffffff
Debug: 302 955 embeddedice.c:497 embeddedice_write_reg(): 12: 0x00000100
Debug: 303 955 embeddedice.c:497 embeddedice_write_reg(): 13: 0x000000f7
Debug: 304 977 core.c:667 jtag_add_reset(): SRST line asserted
Debug: 305 978 core.c:685 jtag_add_reset(): JTAG reset with TLR instead of TRST
Debug: 306 978 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 307 978 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu invoke-event reset-assert-post
Debug: 308 978 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu invoke-event reset-assert-post
Debug: 309 978 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu invoke-event reset-deassert-pre
Debug: 310 978 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu invoke-event reset-deassert-pre
Debug: 311 978 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu cget -chain-position
Debug: 312 978 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu cget -chain-position
Debug: 313 978 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled sam7x256.cpu
Debug: 314 978 command.c:133 script_debug(): command - ocd_jtag ocd_jtag tapisenabled sam7x256.cpu
Debug: 315 979 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu arp_reset deassert 1
Debug: 316 979 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu arp_reset deassert 1
Debug: 317 979 arm7_9_common.c:1064 arm7_9_deassert_reset(): target->state: reset
Debug: 318 1067 core.c:672 jtag_add_reset(): SRST line released
Warn : 319 1067 arm7_9_common.c:1072 arm7_9_deassert_reset(): srst pulls trst - can not reset into halted mode. Issuing halt after reset.
Debug: 320 1067 arm7_9_common.c:75 arm7_9_clear_watchpoints(): -
Debug: 321 1067 embeddedice.c:497 embeddedice_write_reg(): 12: 0x00000000
Debug: 322 1067 embeddedice.c:497 embeddedice_write_reg(): 20: 0x00000000
Debug: 323 1109 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 324 1109 embeddedice.c:497 embeddedice_write_reg(): 12: 0x00000000
Debug: 325 1143 arm7_9_common.c:1397 arm7_9_debug_entry(): target entered debug from ARM state
Debug: 326 1358 armv4_5.c:397 arm_set_cpsr(): set CPSR 0x00000092: IRQ mode, ARM state
Debug: 327 1358 arm7_9_common.c:1425 arm7_9_debug_entry(): target entered debug state in IRQ mode
Debug: 328 1358 arm7_9_common.c:1447 arm7_9_debug_entry(): r0: 0x00000033
Debug: 329 1358 arm7_9_common.c:1447 arm7_9_debug_entry(): r1: 0xffffffff
Debug: 330 1358 arm7_9_common.c:1447 arm7_9_debug_entry(): r2: 0xffffffff
Debug: 331 1358 arm7_9_common.c:1447 arm7_9_debug_entry(): r3: 0xffffffff
Debug: 332 1358 arm7_9_common.c:1447 arm7_9_debug_entry(): r4: 0xffffffff
Debug: 333 1358 arm7_9_common.c:1447 arm7_9_debug_entry(): r5: 0xffffffff
Debug: 334 1358 arm7_9_common.c:1447 arm7_9_debug_entry(): r6: 0xffffffff
Debug: 335 1359 arm7_9_common.c:1447 arm7_9_debug_entry(): r7: 0xffffffff
Debug: 336 1359 arm7_9_common.c:1447 arm7_9_debug_entry(): r8: 0xffffffff
Debug: 337 1359 arm7_9_common.c:1447 arm7_9_debug_entry(): r9: 0xffffffff
Debug: 338 1359 arm7_9_common.c:1447 arm7_9_debug_entry(): r10: 0xffffffff
Debug: 339 1359 arm7_9_common.c:1447 arm7_9_debug_entry(): r11: 0xffffffff
Debug: 340 1359 arm7_9_common.c:1447 arm7_9_debug_entry(): r12: 0xffffffff
Debug: 341 1359 arm7_9_common.c:1447 arm7_9_debug_entry(): r13: 0xffffffff
Debug: 342 1359 arm7_9_common.c:1447 arm7_9_debug_entry(): r14: 0xffffffff
Debug: 343 1359 arm7_9_common.c:1447 arm7_9_debug_entry(): r15: 0x00000424
Debug: 344 1359 arm7_9_common.c:1455 arm7_9_debug_entry(): entered debug state at PC 0x424
Debug: 345 1403 target.c:968 target_call_event_callbacks(): target event 2 (gdb-halt)
Debug: 346 1403 target.c:968 target_call_event_callbacks(): target event 3 (halted)
Debug: 347 1403 target.c:3489 target_handle_event(): target: (0) sam7x256.cpu (arm7tdmi) event: 3 (halted) action:
wait_halt
armv4_5 core_state arm
mww 0xfffffc30 0x0 # run config off internal slow clock …
sleep 100
mww 0xffffff60 0x00270000 # set flash wait state (AT91C_MC_FMR)
mww 0xfffffd44 0xa0008000 # watchdog disable (AT91C_WDTC_WDMR)
force oscillator on
PIO enable and output enable …
mww 0xFFFFF600 0x300000 # PER
mww 0xFFFFF610 0x300000 # OER
mww 0xFFFFF630 0x300000 # PIOB SODR - osc. enable. + KEEPALIVE
sleep 1 # sleep for oscillator
mww 0xfffffc20 0x2 # bypass main oscillator (AT91C_PMC_MOR)
mww 0xfffffc30 0x1 # set master clock to external
sleep 100 # sleep 100 ms
mww 0xfffffd08 0xa5000401 # enable user reset AT91C_RSTC_RMR
now in fast clock
jtag_khz 4300
Debug: 348 1403 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_wait_halt
Debug: 349 1404 command.c:133 script_debug(): command - wait_halt ocd_wait_halt
User : 352 1428 command.c:824 openocd_jim_vfprintf(): wrong # args: should be “armv4_5 params”
User : 353 1428 target.c:1234 target_arch_state(): target state: halted
User : 354 1428 armv4_5.c:603 arm_arch_state(): target halted in ARM state due to breakpoint, current mode: IRQ
cpsr: 0x00000092 pc: 0x00000424
Debug: 355 1428 arm7_9_common.c:1281 arm7_9_halt(): target->state: halted
Debug: 356 1428 arm7_9_common.c:1285 arm7_9_halt(): target was already halted
Debug: 357 1429 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu invoke-event reset-deassert-post
Debug: 358 1429 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu invoke-event reset-deassert-post
Debug: 359 1429 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu cget -chain-position
Debug: 360 1429 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu cget -chain-position
Debug: 361 1429 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled sam7x256.cpu
Debug: 362 1429 command.c:133 script_debug(): command - ocd_jtag ocd_jtag tapisenabled sam7x256.cpu
Debug: 363 1429 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu arp_waitstate halted 1000
Debug: 364 1429 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu arp_waitstate halted 1000
Debug: 365 1449 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu curstate
Debug: 366 1449 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu curstate
Debug: 367 1449 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_sam7x256.cpu invoke-event reset-end
Debug: 368 1449 command.c:133 script_debug(): command - ocd_sam7x256.cpu ocd_sam7x256.cpu invoke-event reset-end
Warn : 369 1468 arm7_9_common.c:2760 arm7_9_check_reset(): NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type ‘help dcc’.
Warn : 370 1468 arm7_9_common.c:2770 arm7_9_check_reset(): NOTE! Severe performance degradation without fast memory access enabled. Type ‘help fast’.
Debug: 371 1468 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_flash write_image erase combo.bin 0x100000 bin
Debug: 372 1468 command.c:133 script_debug(): command - ocd_flash ocd_flash write_image erase combo.bin 0x100000 bin
User : 374 1487 command.c:539 command_print(): auto erase enabled
Debug: 375 1488 configuration.c:87 find_file(): found combo.bin
Debug: 376 1489 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffff240, size: 0x00000004, count: 0x00000001
Debug: 377 1678 target.c:1488 target_read_u32(): address: 0xfffff240, value: 0x271b0940
Debug: 378 1678 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc20, size: 0x00000004, count: 0x00000001
Debug: 379 1860 target.c:1488 target_read_u32(): address: 0xfffffc20, value: 0x00000002
Debug: 380 1860 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc24, size: 0x00000004, count: 0x00000001
Debug: 382 2040 target.c:1488 target_read_u32(): address: 0xfffffc24, value: 0x000132b9
Debug: 383 2040 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc30, size: 0x00000004, count: 0x00000001
Debug: 384 2223 target.c:1488 target_read_u32(): address: 0xfffffc30, value: 0x00000001
Debug: 385 2223 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc2c, size: 0x00000004, count: 0x00000001
Debug: 386 2403 target.c:1488 target_read_u32(): address: 0xfffffc2c, value: 0x00000000
Debug: 387 2403 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
Debug: 389 2584 target.c:1488 target_read_u32(): address: 0xffffff68, value: 0x00000701
Debug: 390 2584 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
Debug: 391 2766 target.c:1488 target_read_u32(): address: 0xffffff68, value: 0x00000701
Debug: 392 2766 at91sam7.c:594 at91sam7_read_part_info(): nvptyp: 0x002, arch: 0x0071
Debug: 393 2767 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc20, size: 0x00000004, count: 0x00000001
Debug: 394 2949 target.c:1488 target_read_u32(): address: 0xfffffc20, value: 0x00000002
Debug: 395 2949 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc24, size: 0x00000004, count: 0x00000001
Debug: 397 3133 target.c:1488 target_read_u32(): address: 0xfffffc24, value: 0x000132b9
Debug: 398 3133 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc30, size: 0x00000004, count: 0x00000001
Debug: 399 3313 target.c:1488 target_read_u32(): address: 0xfffffc30, value: 0x00000001
Debug: 400 3313 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc2c, size: 0x00000004, count: 0x00000001
Debug: 401 3495 target.c:1488 target_read_u32(): address: 0xfffffc2c, value: 0x00000000
Debug: 402 3495 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
Debug: 404 3678 target.c:1488 target_read_u32(): address: 0xffffff68, value: 0x00000701
Debug: 405 3678 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
Debug: 406 3860 target.c:1488 target_read_u32(): address: 0xffffff68, value: 0x00000701
Debug: 407 3860 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc20, size: 0x00000004, count: 0x00000001
Debug: 408 4044 target.c:1488 target_read_u32(): address: 0xfffffc20, value: 0x00000002
Debug: 409 4044 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc24, size: 0x00000004, count: 0x00000001
Debug: 411 4227 target.c:1488 target_read_u32(): address: 0xfffffc24, value: 0x000132b9
Debug: 412 4227 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc30, size: 0x00000004, count: 0x00000001
Debug: 413 4408 target.c:1488 target_read_u32(): address: 0xfffffc30, value: 0x00000001
Debug: 414 4408 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc2c, size: 0x00000004, count: 0x00000001
Debug: 415 4590 target.c:1488 target_read_u32(): address: 0xfffffc2c, value: 0x00000000
Debug: 416 4590 at91sam7.c:220 at91sam7_set_flash_mode(): fmcn[0]: 28
Debug: 417 4590 target.c:1565 target_write_u32(): address: 0xffffff60, value: 0x001c0000
Debug: 418 4590 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000004
Debug: 419 4752 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 420 4813 target.c:1565 target_write_u32(): address: 0xffffff64, value: 0x5a000008
Debug: 421 4813 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000004
Debug: 422 4973 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 423 5033 at91sam7.c:263 at91sam7_flash_command(): Flash command: 0x5a000008, flash bank: 1, page number: 0
Debug: 424 5033 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
Debug: 426 5216 target.c:1488 target_read_u32(): address: 0xffffff68, value: 0x00000701
Debug: 427 5216 at91sam7.c:238 at91sam7_wait_status_busy(): status[0]: 0x701
Debug: 428 5216 at91sam7.c:985 at91sam7_write(): first_page: 0, last_page: 1024, count 262144
Debug: 429 5216 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc20, size: 0x00000004, count: 0x00000001
Debug: 430 5396 target.c:1488 target_read_u32(): address: 0xfffffc20, value: 0x00000002
Debug: 431 5396 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc24, size: 0x00000004, count: 0x00000001
Debug: 432 5577 target.c:1488 target_read_u32(): address: 0xfffffc24, value: 0x000132b9
Debug: 433 5577 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc30, size: 0x00000004, count: 0x00000001
Debug: 435 5758 target.c:1488 target_read_u32(): address: 0xfffffc30, value: 0x00000001
Debug: 436 5758 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xfffffc2c, size: 0x00000004, count: 0x00000001
Debug: 437 5938 target.c:1488 target_read_u32(): address: 0xfffffc2c, value: 0x00000000
Debug: 438 5938 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000004
Debug: 439 7014 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 440 7073 target.c:1565 target_write_u32(): address: 0xffffff64, value: 0x5a000001
Debug: 441 7073 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000004
Debug: 442 7235 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 443 7296 at91sam7.c:263 at91sam7_flash_command(): Flash command: 0x5a000001, flash bank: 1, page number: 0
Debug: 444 7296 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
Debug: 445 7392 log.c:496 keep_alive(): keep_alive() was not invoked in the 1000ms timelimit (1719). This may cause trouble with GDB connections.
Debug: 447 7479 target.c:1488 target_read_u32(): address: 0xffffff68, value: 0x00000701
Debug: 448 7479 at91sam7.c:238 at91sam7_wait_status_busy(): status[0]: 0x701
Debug: 449 7480 at91sam7.c:1012 at91sam7_write(): Write flash bank:0 page number:0
Debug: 450 7480 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000004
Debug: 451 8564 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 452 8624 target.c:1565 target_write_u32(): address: 0xffffff64, value: 0x5a000101
Debug: 453 8624 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000004
Debug: 454 8786 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 455 8845 at91sam7.c:263 at91sam7_flash_command(): Flash command: 0x5a000101, flash bank: 1, page number: 1
Debug: 456 8845 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
Debug: 457 8942 log.c:496 keep_alive(): keep_alive() was not invoked in the 1000ms timelimit (1550). This may cause trouble with GDB connections.
Debug: 459 9028 target.c:1488 target_read_u32(): address: 0xffffff68, value: 0x00000701
Debug: 460 9028 at91sam7.c:238 at91sam7_wait_status_busy(): status[0]: 0x701
Debug: 461 9028 at91sam7.c:1012 at91sam7_write(): Write flash bank:0 page number:1
Debug: 462 9028 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000004
Debug: 463 10109 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 464 10169 target.c:1565 target_write_u32(): address: 0xffffff64, value: 0x5a000201
Debug: 465 10169 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000004
Debug: 466 10330 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000005
Debug: 467 10389 at91sam7.c:263 at91sam7_flash_command(): Flash command: 0x5a000201, flash bank: 1, page number: 2
Debug: 468 10389 arm7_9_common.c:2237 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
Debug: 469 10484 log.c:496 keep_alive(): keep_alive() was not invoked in the 1000ms timelimit (1542). This may cause trouble with GDB connections.
Debug: 471 10570 target.c:1488 target_read_u32(): address: 0xffffff68, value: 0x00000701
Debug: 472 10570 at91sam7.c:238 at91sam7_wait_status_busy(): status[0]: 0x701
Debug: 473 10570 at91sam7.c:1012 at91sam7_write(): Write flash bank:0 page number:2
Debug: 474 10570 embeddedice.c:497 embeddedice_write_reg(): 0: 0x00000004
^Cmake: *** [prog_enode_r6] Interrupt