openOCD: adding non-CFI compatible flashes
I am working LPC-H2214 and I want load my source code at external flash memory. Unfortunately, this flash doesn’t CFI compatible. Dominic told me, I can add my flash to that list. ./src/flash/non_cfi.c. I did it, and still I can’t load my code. When I probe 1, I have this message: probing failed for flash bank ‘#1’ at 0x80000000
Like you see:
Open On-Chip Debugger
flash probe 0
flash ‘lpc2000’ found at 0x00000000
flash erase 0 0 0
erased sectors 0 through 0 on flash bank 0 in 0s 515000us
flash write 0 main.bin 0x0
wrote 996 byte from file main.bin to flash bank 0 at offset 0x00000000 in 0s 29
7000us (3.274937 kb/s)
> flash probe 1
probing failed for flash bank ‘#1’ at 0x80000000>
The follow code is part of non_cfi.c and I added blue part
/* non-CFI compatible flashes */
non_cfi_t non_cfi_flashes = {
{
.mfr = CFI_MFR_SST,
.id = 0xd4,
.pri_id = 0x02,
.dev_size = 0x10, /* 2^16 = 64KB */
.interface_desc = 0x0, /* x8 only device */
.max_buf_write_size = 0x0,
.num_erase_regions = 1,
.erase_region_info =
{
0x0010000f, /* 16x 4KB */
0x00000000
}
},
{
.mfr = CFI_MFR_SST,
.id = 0xd5,
.pri_id = 0x02,
.dev_size = 0x11, /* 2^17 = 128KB */
.interface_desc = 0x0, /* x8 only device */
.max_buf_write_size = 0x0,
.num_erase_regions = 1,
.erase_region_info =
{
0x0010001f,
0x00000000
}
},
{
.mfr = CFI_MFR_SST,
.id = 0xd6,
.pri_id = 0x02,
.dev_size = 0x12, /* 2^18 = 256KB */
.interface_desc = 0x0, /* x8 only device */
.max_buf_write_size = 0x0,
.num_erase_regions = 1,
.erase_region_info =
{
0x0010003f,
0x00000000
}
},
{
.mfr = CFI_MFR_SST,
.id = 0xd7,
.pri_id = 0x02,
.dev_size = 0x13, /* 2^19 = 512KB */
.interface_desc = 0x0, /* x8 only device */
.max_buf_write_size = 0x0,
.num_erase_regions = 1,
.erase_region_info =
{
0x0010007f,
0x00000000
}
},
{
.mfr = CFI_MFR_ST,
.id = 0xd6, /* ST29F400BB */
.pri_id = 0x02,
.dev_size = 0x13, /* 2^19 = 512KB */
.interface_desc = 0x2, /* x8 or x16 device with nBYTE */
.max_buf_write_size = 0x0,
.num_erase_regions = 4,
.erase_region_info =
{
0x00400000, /* 1x 16KB */
0x00200001, /* 2x 8KB */
0x00800000, /* 1x 32KB */
0x01000006, /* 7x 64KB */
0x00000000
}
},
{
.mfr = CFI_MFR_ST,
.id = 0xd5, /* ST29F400BT */
.pri_id = 0x02,
.dev_size = 0x13, /* 2^19 = 512KB */
.interface_desc = 0x2, /* x8 or x16 device with nBYTE */
.max_buf_write_size = 0x0,
.num_erase_regions = 4,
.erase_region_info =
{
0x01000006, /* 7x 64KB */
0x00800000, /* 1x 32KB */
0x00200001, /* 2x 8KB */
0x00400000, /* 1x 16KB */
0x00000000
}
},
{
.mfr = CFI_MFR_AMD,
.id = 0x22ab, /* AM29F400BB */
.pri_id = 0x02,
.dev_size = 0x13, /* 2^19 = 512KB */
.interface_desc = 0x2, /* x8 or x16 device with nBYTE */
.max_buf_write_size = 0x0,
.num_erase_regions = 4,
.erase_region_info =
{
0x00400000, /* 1x 16KB */
0x00200001, /* 2x 8KB */
0x00800000, /* 1x 32KB */
0x01000006, /* 7x 64KB */
0x00000000
}
},
{
.mfr = CFI_MFR_AMD,
.id = 0x2223, /* AM29F400BT */
.pri_id = 0x02,
.dev_size = 0x13, /* 2^19 = 512KB */
.interface_desc = 0x2, /* x8 or x16 device with nBYTE */
.max_buf_write_size = 0x0,
.num_erase_regions = 4,
.erase_region_info =
{
0x01000006, /* 7x 64KB */
0x00800000, /* 1x 32KB */
0x00200001, /* 2x 8KB */
0x00400000, /* 1x 16KB */
0x00000000
}
},
{/* added by rabileh */
.mfr = CFI_MFR_MX,
.id = 0x225B, /* MX26LV800B */
.pri_id = 0x02,
.dev_size = 0x13, /* 2^20 = 1024KB */
.interface_desc = 0x2, /* x8 or x16 device with nBYTE */
.max_buf_write_size = 0x0,
.num_erase_regions = 4,
.erase_region_info =
{
0x00400000, /* 1x 16KB */
0x00200001, /* 2x 8KB */
0x00800000, /* 1x 32KB */
0x0100000E, /* 15x 64KB */
0x00000000
}
},
{
.mfr = CFI_MFR_MX,
.id = 0x22DA, /* MX26LV800T */
.pri_id = 0x02,
.dev_size = 0x13, /* 2^20 = 1024KB */
.interface_desc = 0x2, /* x8 or x16 device with nBYTE */
.max_buf_write_size = 0x0,
.num_erase_regions = 4,
.erase_region_info =
{
0x0100000E, /* 15x 64KB */
0x00800000, /* 1x 32KB */
0x00200001, /* 2x 8KB */
0x00400000, /* 1x 16KB */
0x00000000
}
}, {
.mfr = 0,
.id = 0,
}
};
cfi.h, I added also the blue part
#define CFI_MFR_AMD 0x0001
#define CFI_MFR_ATMEL 0x001F
#define CFI_MFR_ST 0x0020 /* STMicroelectronics */
#define CFI_MFR_SST 0x00BF
#define CFI_MFR_MX 0x00C2 /* MX26LV800T/B / / added by rabileh*/
#define CFI_MFR_ANY 0xffff
#define CFI_ID_ANY 0xffff
cfi.c, I added also the blue part
/* fixup after identifying JEDEC manufactuer and ID */
cfi_fixup_t cfi_jedec_fixups = {
{CFI_MFR_SST, 0x00D4, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D5, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D6, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D7, cfi_fixup_non_cfi, NULL},
{CFI_MFR_ST, 0x00D5, cfi_fixup_non_cfi, NULL},
{CFI_MFR_ST, 0x00D6, cfi_fixup_non_cfi, NULL},
{CFI_MFR_AMD, 0x2223, cfi_fixup_non_cfi, NULL},
{CFI_MFR_AMD, 0x22ab, cfi_fixup_non_cfi, NULL},
{CFI_MFR_MX, 0x22DA, cfi_fixup_non_cfi, NULL},/* added by rabileh*/
{CFI_MFR_MX, 0x225B, cfi_fixup_non_cfi, NULL},/* added by rabileh*/
{0, 0, NULL, NULL}
};
This is my arm7_ft2232.cfg
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface ft2232
ft2232_device_desc “Olimex OpenOCD JTAG A”
ft2232_layout “olimex-jtag”
ft2232_vid_pid 0x15BA 0x0003
jtag_speed 7
#use combined on interfaces or targets that can’t set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 333
jtag_ntrst_delay 333
#target configuration
daemon_startup reset
#target
#target arm7tdmi
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
#target_script 0 reset h2294_init.script
run_and_halt_time 0 30
working_area 0 0x40000000 0x40000 nobackup
#flash configuration
#flash bank lpc2000 0 0 <target#>
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
flash bank cfi 0x80000000 0x400000 2 2 0
For more information about the configuration files, take a look at:
http://openfacts.berlios.de/index-en.ph … p+Debugger
Can someboby tell me what I miss there?
Best regards,
rabileh.