wiggler, cfi - intel compatible, Arm 7, beginner, Flash prob

GAllen · November 17, 2006, 12:15pm

I’m now using an Arm7 based display controller with the olimex wiggler.

I’ve got most the configuration right but i’m struggling a bit on the flash, i’ve got it going using my normal ide and jtag but not on openocd. any idea what i’m doing wrong? Thanks.

The flash attached is intell command compatible M28W640FCB, 64Mbit (4*16)

the mww were the registers that needed setting to configure the LH75411 to use the flash.

Script:

#remap

mww 0xfffe2008 0x00000000

#hclk

mww 0xfffe2018 0x0000000F

#disable watchdog

mww 0xfffe3000 0x00000000

#set chip selects

mww 0xFFFF1000 0xEFFF0010

mww 0xFFFF1004 0xEFFF0010

mww 0xFFFF1008 0xEFFF0010

#SET IO CON MUX

mww 0xFFFE5000 0x00007FFF

flash protect 0 0 70 off

flash erase 0 0 70

flash write 0 Disp.bin 0

reset run

shutdown

Config:

telnet_port 4444

gdb_port 3333

interface parport

parport_port 0x378

parport_cable wiggler

jtag_speed 0

jtag_nsrst_delay 100

jtag_ntrst_delay 100

reset_config srst_only

#jtag scan chain

jtag_device 4 0x1 0xf 0xe

daemon_startup reset

target arm7tdmi little run_and_init 0 arm7tdmi

run_and_halt_time 0 1000

working_area 0 0x60000000 0x4000 nobackup

#flash bank <chip_width> <bus_width>

target_script 0 reset Myscript_LH.script

flash bank cfi 0x40000000 0x4000000 2 2 0 0x60000000 0x4000

Log:

Debug: jtag.c:1210 jtag_init():

Debug: parport.c:373 parport_init(): requesting privileges for parallel port 0x378…

Debug: parport.c:383 parport_init(): …privileges granted

Debug: parport.c:210 parport_reset(): trst: 0, srst: 0

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 1

Debug: jtag.c:1096 jtag_reset_callback():

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 1

Debug: jtag.c:1096 jtag_reset_callback():

Debug: openocd.c:100 main(): jtag init complete

Debug: arm7_9_common.c:656 arm7_9_assert_reset(): target->state: unknown

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 0

Debug: jtag.c:1096 jtag_reset_callback():

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 1

Debug: jtag.c:1096 jtag_reset_callback():

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 0

Debug: jtag.c:1096 jtag_reset_callback():

Debug: parport.c:210 parport_reset(): trst: 0, srst: 1

Debug: arm7_9_common.c:722 arm7_9_deassert_reset(): target->state: reset

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 2

Debug: jtag.c:1096 jtag_reset_callback():

Debug: parport.c:210 parport_reset(): trst: 0, srst: 0

Debug: openocd.c:104 main(): target init complete

Debug: openocd.c:108 main(): flash init complete

Debug: gdb_server.c:1347 gdb_init(): gdb service for target arm7tdmi at port 3333

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 3

Debug: jtag.c:1096 jtag_reset_callback():

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: arm7_9_common.c:838 arm7_9_halt(): target->state: running

Debug: embeddedice.c:253 embeddedice_write_reg(): 9: 0xffffffff

Debug: embeddedice.c:253 embeddedice_write_reg(): 11: 0xffffffff

Debug: embeddedice.c:253 embeddedice_write_reg(): 12: 0x00000100

Debug: embeddedice.c:253 embeddedice_write_reg(): 13: 0x000000f7

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: arm7_9_common.c:620 arm7_9_poll(): DBGACK set, dbg_state->value: 0x9

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Debug: embeddedice.c:253 embeddedice_write_reg(): 12: 0x00000000

Debug: arm7_9_common.c:944 arm7_9_debug_entry(): target entered debug from ARM state

Debug: arm7_9_common.c:976 arm7_9_debug_entry(): target entered debug state in Supervisor mode

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r0: 0x000000d3

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r1: 0x00007fff

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r2: 0xe0022003

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r3: 0xe2511001

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r4: 0x1afffffb

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r5: 0xeafffffe

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r6: 0x50d4ccd0

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r7: 0xdc60062a

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r8: 0x2012525c

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r9: 0x99d4c464

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r10: 0x00a40655

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r11: 0x204a2671

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r12: 0x5194281d

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r13: 0x3d1400a0

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r14: 0x00002004

Debug: arm7_9_common.c:1005 arm7_9_debug_entry(): r15: 0x00001a74

Debug: arm7_9_common.c:1011 arm7_9_debug_entry(): entered debug state at PC 0x1a74

Debug: target.c:442 target_call_event_callbacks(): target event 0

Info: target.c:219 target_init_handler(): executing reset script ‘Myscript_LH.script’

Debug: target.c:1254 handle_halt_command():

Info: configuration.c:50 configuration_output_handler(): requesting target halt…

Debug: arm7_9_common.c:838 arm7_9_halt(): target->state: halted

Warning: arm7_9_common.c:842 arm7_9_halt(): target was already halted

Info: configuration.c:50 configuration_output_handler(): target already halted

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0xfffe2008, size: 0x00000004, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0xfffe2018, size: 0x00000004, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0xfffe3000, size: 0x00000004, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0xffff1000, size: 0x00000004, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0xffff1004, size: 0x00000004, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0xffff1008, size: 0x00000004, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0xfffe5000, size: 0x00000004, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Info: configuration.c:50 configuration_output_handler(): sector number(s) invalid

Info: configuration.c:50 configuration_output_handler(): failed writing file Disp.bin to flash bank 0 at offset 0x00000000

Info: configuration.c:50 configuration_output_handler(): unknown error

Debug: target.c:1328 handle_reset_command():

Debug: arm7_9_common.c:656 arm7_9_assert_reset(): target->state: halted

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 0

Debug: jtag.c:1096 jtag_reset_callback():

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 1

Debug: jtag.c:1096 jtag_reset_callback():

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 0

Debug: jtag.c:1096 jtag_reset_callback():

Debug: parport.c:210 parport_reset(): trst: 0, srst: 1

Debug: arm7_9_common.c:722 arm7_9_deassert_reset(): target->state: reset

Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 2

Debug: jtag.c:1096 jtag_reset_callback():

Debug: parport.c:210 parport_reset(): trst: 0, srst: 0

Dominic · November 17, 2006, 12:24pm

You have to run “flash probe” after you’ve configured your external memory interface, but before you’re accessing other flash functions.

The last two arguments to the “flash bank” are bogus - they’re correctly specified in the working_area line, and aren’t part of the flash bank configuration.

Regards,

Dominic

GAllen · November 17, 2006, 12:46pm

Thanks Dominic,

i have ammended the script to call:

flash probe 0

before it calls flash erase and the flash bank to:

flash bank cfi 0x40000000 0x4000000 2 2 0

but its still failing on the probe is the 2 2 0 correct for 16 bit addressing (i’ve also tried 1 1 0)?

Log lines around the flash probe:

Warning: arm7_9_common.c:1963 arm7_9_write_memory(): memory write caused data abort (address: 0x40000000, size: 0x2, count: 0x1)

Debug: arm7tdmi.c:506 arm7tdmi_write_xpsr_im8(): xpsr_im: d3, rot: 0, spsr: 0

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0x40000000, size: 0x00000002, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Warning: arm7_9_common.c:1963 arm7_9_write_memory(): memory write caused data abort (address: 0x40000000, size: 0x2, count: 0x1)

Debug: arm7tdmi.c:506 arm7tdmi_write_xpsr_im8(): xpsr_im: d3, rot: 0, spsr: 0

Info: configuration.c:50 configuration_output_handler(): probing failed for flash bank ‘#0’ at 0x40000000

Info: configuration.c:50 configuration_output_handler(): sector number(s) invalid

Info: configuration.c:50 configuration_output_handler(): failed writing file Disp.bin to flash bank 0 at offset 0x00000000

Info: configuration.c:50 configuration_output_handler(): unknown error

Thanks for your help:)

Dominic · November 17, 2006, 1:37pm

Your chip is generating data aborts when the OpenOCD tries to write to the Flash address (0x40000000) to enter CFI query mode.

The values you’re writing at 0xFFFF100[0,4,8] (0xEFFF0010) seem completely bogus according to the user’s manual, make sure you’re setting them correctly. I guess the data abort occurs because you’re setting WP (bit 26) to 1.

The size your specifying for the flash bank is wrong, too. Your 64Mbit device has 8MB, but you’re setting it to 64MB size. The correct value for 8MB is 0x800000.

Regards,

Dominic

GAllen · November 20, 2006, 2:40pm

oh rats ok you’re right i got it back to front,

EFFF0010=>1000FFEF

I’ve changed the memory to what you said too.

and i’ve added lines to the script to set the pc =0 and cpsr =0xd3 as the script in my other ide was doing.

i still have a problem though:

Debug: cfi.c:887 cfi_probe(): CFI qry returned: 0xffffffff 0xffffffff 0xffffffff

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0x40000000, size: 0x00000001, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Debug: arm7_9_common.c:1822 arm7_9_write_memory(): address: 0x40000000, size: 0x00000001, count: 0x00000001

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000004

Debug: embeddedice.c:157 embeddedice_read_reg_w_check(): 1

Debug: embeddedice.c:253 embeddedice_write_reg(): 0: 0x00000005

Info: configuration.c:50 configuration_output_handler(): probing failed for flash bank ‘#0’ at 0x40000000

Info: configuration.c:50 configuration_output_handler(): sector number(s) invalid

Info: con

Sorry to be a pain but can you see anything else i’ve missed?

GAllen · November 20, 2006, 3:25pm

[Edit]

Found that problem i was using:

flash bank cfi 0x40000000 0x400000 1 1 0

when i should have been using

flash bank cfi 0x40000000 0x400000 2 2 0

That cfi’s fine now however when i try to program it says low programming voltage detected, Operation aborted

:? Any Ideas?

Thanks

Dominic · November 20, 2006, 3:55pm

Please send the complete log and the .cfg you’ve used to Dominic.Rath@gmx.de.

Regards,

Dominic

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wiggler, cfi - intel compatible, Arm 7, beginner, Flash prob

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