Hi,
I have just begun playing with a custom-made board containing an LPC2364, I am using an OLIMEX ARM-USB-OCD with yagarto (openOCD r592, arm-elf-gcc) and eclipse (Europa with CDT and Zylin).
Everything works flawlessly when I leave the LPC running on 4MHz from the IRC but when I want to use the planned config (running from 32.769khz RTC on 72 or 48MHz) the trouble starts:
during the process of PLL-configuration there is a phase were the CPU has to run on 32.768khz after the change of the reference-clock and a brief moment where the clock goes even further down (8192hz or 5461hz) and thats where my debugging-session dies. This is perfectly understandable since the JTAG-Clock would have to be way lower during this phase in order to communicate with the device but setting the jtag_speed that low all the time is out of the question because it makes debugging impossible…
What I am trying to configure is a system that allows the CPU to initialize the PLL and attaches to JTAG AFTERWARDS with a reasonable speed to start debugging. I also want to be able to load&debug with a single action from eclipse and not do a load and separate debug-session afterwards.
So far I have tried various constellations (run_and_init with script to configure PLL, run_and_halt…) but I have not found a 100% working solution and its a little hard to set a first breakpoint right after the init.
Any pointers would be very helpful, I can also post my config it thats any help but currently its in a state of constant flux…
kind regards