here it
~/arm-none-eabi/bin/openocd --debug -f KT-Like.cfg -f target/stm32l.cfg -c "adapter_khz 150" -c init -c "reset halt" -c "flash info 0" -c "reset run" -c shutdown
Open On-Chip Debugger 0.6.0-dev-00611-g6d639b0 (2012-07-08-12:52)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
User : 11 2 command.c:547 command_print(): debug_level: 3
Debug: 12 2 configuration.c:45 add_script_search_dir(): adding /home/dimas192/.openocd
Debug: 13 2 configuration.c:45 add_script_search_dir(): adding /home/dimas192/arm-none-eabi/share/openocd/site
Debug: 14 2 configuration.c:45 add_script_search_dir(): adding /home/dimas192/arm-none-eabi/share/openocd/scripts
Debug: 15 2 configuration.c:86 find_file(): found KT-Like.cfg
Debug: 16 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_interface ft2232
Debug: 17 2 command.c:145 script_debug(): command - interface ocd_interface ft2232
Debug: 19 2 command.c:367 register_command_handler(): registering 'ocd_ft2232_device_desc'...
Debug: 20 2 command.c:367 register_command_handler(): registering 'ocd_ft2232_serial'...
Debug: 21 2 command.c:367 register_command_handler(): registering 'ocd_ft2232_layout'...
Debug: 22 2 command.c:367 register_command_handler(): registering 'ocd_ft2232_vid_pid'...
Debug: 23 2 command.c:367 register_command_handler(): registering 'ocd_ft2232_latency'...
Info : 24 2 transport.c:118 allow_transports(): only one transport option; autoselect 'jtag'
Debug: 25 2 command.c:367 register_command_handler(): registering 'ocd_jtag_flush_queue_sleep'...
Debug: 26 2 command.c:367 register_command_handler(): registering 'ocd_jtag_rclk'...
Debug: 27 2 command.c:367 register_command_handler(): registering 'ocd_jtag_ntrst_delay'...
Debug: 28 2 command.c:367 register_command_handler(): registering 'ocd_jtag_ntrst_assert_width'...
Debug: 29 2 command.c:367 register_command_handler(): registering 'ocd_scan_chain'...
Debug: 30 2 command.c:367 register_command_handler(): registering 'ocd_jtag_reset'...
Debug: 31 2 command.c:367 register_command_handler(): registering 'ocd_runtest'...
Debug: 32 2 command.c:367 register_command_handler(): registering 'ocd_irscan'...
Debug: 33 2 command.c:367 register_command_handler(): registering 'ocd_verify_ircapture'...
Debug: 34 2 command.c:367 register_command_handler(): registering 'ocd_verify_jtag'...
Debug: 35 2 command.c:367 register_command_handler(): registering 'ocd_tms_sequence'...
Debug: 36 2 command.c:367 register_command_handler(): registering 'ocd_wait_srst_deassert'...
Debug: 37 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 38 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 39 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 40 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 41 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 42 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 43 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 44 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 45 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 46 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 47 2 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 48 3 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 49 3 command.c:367 register_command_handler(): registering 'ocd_jtag'...
Debug: 50 3 command.c:367 register_command_handler(): registering 'ocd_svf'...
Debug: 51 3 command.c:367 register_command_handler(): registering 'ocd_xsvf'...
Debug: 52 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_ft2232_vid_pid 0x0403 0x6010
Debug: 53 3 command.c:145 script_debug(): command - ft2232_vid_pid ocd_ft2232_vid_pid 0x0403 0x6010
Debug: 55 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_ft2232_device_desc Dual RS232-HS
Debug: 56 3 command.c:145 script_debug(): command - ft2232_device_desc ocd_ft2232_device_desc Dual RS232-HS
Debug: 58 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_ft2232_layout ktlink
Debug: 59 3 command.c:145 script_debug(): command - ft2232_layout ocd_ft2232_layout ktlink
Debug: 61 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_ft2232_latency 2
Debug: 62 3 command.c:145 script_debug(): command - ft2232_latency ocd_ft2232_latency 2
Debug: 64 3 configuration.c:86 find_file(): found /home/dimas192/arm-none-eabi/share/openocd/scripts/target/stm32l.cfg
Debug: 65 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 100
Debug: 66 3 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 100
Debug: 68 3 core.c:1625 jtag_config_khz(): handle jtag khz
Debug: 69 3 core.c:1592 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 70 3 core.c:1592 adapter_khz_to_speed(): convert khz to interface specific speed value
User : 71 3 command.c:547 command_print(): 100 kHz
Debug: 72 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_nsrst_delay 100
Debug: 73 3 command.c:145 script_debug(): command - adapter_nsrst_delay ocd_adapter_nsrst_delay 100
User : 75 3 command.c:547 command_print(): adapter_nsrst_delay: 100
Debug: 76 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag_ntrst_delay 100
Debug: 77 3 command.c:145 script_debug(): command - jtag_ntrst_delay ocd_jtag_ntrst_delay 100
User : 79 3 command.c:547 command_print(): jtag_ntrst_delay: 100
Debug: 80 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag newtap stm32l cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4ba00477
Debug: 81 3 command.c:145 script_debug(): command - ocd_jtag ocd_jtag newtap stm32l cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4ba00477
Debug: 82 3 tcl.c:554 jim_newtap_cmd(): Creating New Tap, Chip: stm32l, Tap: cpu, Dotted: stm32l.cpu, 8 params
Debug: 83 3 tcl.c:571 jim_newtap_cmd(): Processing option: -irlen
Debug: 84 3 tcl.c:571 jim_newtap_cmd(): Processing option: -ircapture
Debug: 85 3 tcl.c:571 jim_newtap_cmd(): Processing option: -irmask
Debug: 86 3 tcl.c:571 jim_newtap_cmd(): Processing option: -expected-id
Debug: 87 3 core.c:1323 jtag_tap_init(): Created Tap: stm32l.cpu @ abs position 0, irlen 4, capture: 0x1 mask: 0xf
Debug: 88 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag newtap stm32l bs -irlen 5 -expected-id 0x06416041
Debug: 89 4 command.c:145 script_debug(): command - ocd_jtag ocd_jtag newtap stm32l bs -irlen 5 -expected-id 0x06416041
Debug: 90 4 tcl.c:554 jim_newtap_cmd(): Creating New Tap, Chip: stm32l, Tap: bs, Dotted: stm32l.bs, 4 params
Debug: 91 4 tcl.c:571 jim_newtap_cmd(): Processing option: -irlen
Debug: 92 4 tcl.c:571 jim_newtap_cmd(): Processing option: -expected-id
Debug: 93 4 core.c:1323 jtag_tap_init(): Created Tap: stm32l.bs @ abs position 1, irlen 5, capture: 0x1 mask: 0x3
Debug: 94 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create stm32l.cpu cortex_m3 -endian little -chain-position stm32l.cpu
Debug: 95 4 command.c:145 script_debug(): command - ocd_target ocd_target create stm32l.cpu cortex_m3 -endian little -chain-position stm32l.cpu
Debug: 96 4 target.c:1620 target_free_all_working_areas_restore(): freeing all working areas
Debug: 97 4 command.c:367 register_command_handler(): registering 'ocd_arm'...
Debug: 98 4 command.c:367 register_command_handler(): registering 'ocd_arm'...
Debug: 99 4 command.c:367 register_command_handler(): registering 'ocd_arm'...
Debug: 100 4 command.c:367 register_command_handler(): registering 'ocd_arm'...
Debug: 101 4 command.c:367 register_command_handler(): registering 'ocd_arm'...
Debug: 102 4 command.c:367 register_command_handler(): registering 'ocd_arm'...
Debug: 103 4 command.c:367 register_command_handler(): registering 'ocd_dap'...
Debug: 104 4 command.c:367 register_command_handler(): registering 'ocd_dap'...
Debug: 105 4 command.c:367 register_command_handler(): registering 'ocd_dap'...
Debug: 106 4 command.c:367 register_command_handler(): registering 'ocd_dap'...
Debug: 107 4 command.c:367 register_command_handler(): registering 'ocd_dap'...
Debug: 108 4 command.c:367 register_command_handler(): registering 'ocd_cortex_m3'...
Debug: 109 4 command.c:367 register_command_handler(): registering 'ocd_cortex_m3'...
Debug: 110 4 command.c:367 register_command_handler(): registering 'ocd_cortex_m3'...
Debug: 111 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 112 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 113 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 114 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 115 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 116 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 117 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 118 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 119 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 120 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 121 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 122 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 123 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 124 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 125 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 126 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 127 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 128 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 129 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 130 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 131 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 132 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 133 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 134 4 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 135 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 136 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 137 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 138 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 139 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 140 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 141 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 142 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 143 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 144 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 145 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 146 5 command.c:367 register_command_handler(): registering 'ocd_stm32l.cpu'...
Debug: 147 5 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu configure -work-area-phys 0x20000000 -work-area-size 0x3800 -work-area-backup 0
Debug: 148 5 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu configure -work-area-phys 0x20000000 -work-area-size 0x3800 -work-area-backup 0
Debug: 149 5 target.c:1620 target_free_all_working_areas_restore(): freeing all working areas
Debug: 150 5 target.c:1620 target_free_all_working_areas_restore(): freeing all working areas
Debug: 151 5 target.c:1620 target_free_all_working_areas_restore(): freeing all working areas
Debug: 152 5 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash bank stm32l.flash stm32lx 0x08000000 0 0 0 stm32l.cpu
Debug: 153 5 command.c:145 script_debug(): command - ocd_flash ocd_flash bank stm32l.flash stm32lx 0x08000000 0 0 0 stm32l.cpu
Debug: 155 5 tcl.c:780 handle_flash_bank_command(): 'stm32lx' driver usage field missing
Debug: 156 5 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_cortex_m3 reset_config sysresetreq
Debug: 157 5 command.c:145 script_debug(): command - ocd_cortex_m3 ocd_cortex_m3 reset_config sysresetreq
User : 159 5 command.c:547 command_print(): cortex_m3 reset_config sysresetreq
Debug: 160 5 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu configure -event reset-init
stm32l_enable_HSI
Debug: 161 5 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu configure -event reset-init
stm32l_enable_HSI
Debug: 162 5 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 150
Debug: 163 5 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 150
Debug: 165 5 core.c:1625 jtag_config_khz(): handle jtag khz
Debug: 166 5 core.c:1592 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 167 5 core.c:1592 adapter_khz_to_speed(): convert khz to interface specific speed value
User : 168 5 command.c:547 command_print(): 150 kHz
Debug: 169 5 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 170 5 command.c:145 script_debug(): command - init ocd_init
Debug: 172 18 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target init
Debug: 173 18 command.c:145 script_debug(): command - ocd_target ocd_target init
Debug: 175 18 target.c:1183 handle_target_init_command(): Initializing targets...
Debug: 176 18 command.c:367 register_command_handler(): registering 'ocd_target_request'...
Debug: 177 18 command.c:367 register_command_handler(): registering 'ocd_trace'...
Debug: 178 18 command.c:367 register_command_handler(): registering 'ocd_trace'...
Debug: 179 18 command.c:367 register_command_handler(): registering 'ocd_fast_load_image'...
Debug: 180 18 command.c:367 register_command_handler(): registering 'ocd_fast_load'...
Debug: 181 18 command.c:367 register_command_handler(): registering 'ocd_profile'...
Debug: 182 18 command.c:367 register_command_handler(): registering 'ocd_virt2phys'...
Debug: 183 18 command.c:367 register_command_handler(): registering 'ocd_reg'...
Debug: 184 18 command.c:367 register_command_handler(): registering 'ocd_poll'...
Debug: 185 18 command.c:367 register_command_handler(): registering 'ocd_wait_halt'...
Debug: 186 18 command.c:367 register_command_handler(): registering 'ocd_halt'...
Debug: 187 18 command.c:367 register_command_handler(): registering 'ocd_resume'...
Debug: 188 18 command.c:367 register_command_handler(): registering 'ocd_reset'...
Debug: 189 18 command.c:367 register_command_handler(): registering 'ocd_soft_reset_halt'...
Debug: 190 18 command.c:367 register_command_handler(): registering 'ocd_step'...
Debug: 191 18 command.c:367 register_command_handler(): registering 'ocd_mdw'...
Debug: 192 18 command.c:367 register_command_handler(): registering 'ocd_mdh'...
Debug: 193 18 command.c:367 register_command_handler(): registering 'ocd_mdb'...
Debug: 194 18 command.c:367 register_command_handler(): registering 'ocd_mww'...
Debug: 195 18 command.c:367 register_command_handler(): registering 'ocd_mwh'...
Debug: 196 18 command.c:367 register_command_handler(): registering 'ocd_mwb'...
Debug: 197 18 command.c:367 register_command_handler(): registering 'ocd_bp'...
Debug: 198 18 command.c:367 register_command_handler(): registering 'ocd_rbp'...
Debug: 199 18 command.c:367 register_command_handler(): registering 'ocd_wp'...
Debug: 200 18 command.c:367 register_command_handler(): registering 'ocd_rwp'...
Debug: 201 18 command.c:367 register_command_handler(): registering 'ocd_load_image'...
Debug: 202 18 command.c:367 register_command_handler(): registering 'ocd_dump_image'...
Debug: 203 18 command.c:367 register_command_handler(): registering 'ocd_verify_image'...
Debug: 204 18 command.c:367 register_command_handler(): registering 'ocd_test_image'...
Debug: 205 18 command.c:367 register_command_handler(): registering 'ocd_reset_nag'...
Debug: 206 18 command.c:367 register_command_handler(): registering 'ocd_ps'...
Debug: 207 18 ft2232.c:2329 ft2232_init(): ft2232 interface using shortest path jtag state transitions
Debug: 208 18 ft2232.c:2216 ft2232_init_libftdi(): 'ft2232' interface using libftdi with 'ktlink' layout (0403:6010)
Debug: 209 51 ft2232.c:2255 ft2232_init_libftdi(): current latency timer: 2
Debug: 210 51 ft2232.c:2266 ft2232_init_libftdi(): FTDI chip type: 4 "2232H"
Debug: 211 51 ft2232.c:2291 ft2232_set_data_bits_low_byte(): 80 28 3b
Debug: 212 52 ft2232.c:2310 ft2232_set_data_bits_high_byte(): 82 89 ff
Info : 213 52 ft2232.c:647 ft2232h_ft4232h_clk_divide_by_5(): max TCK change to: 30000 kHz
Debug: 214 52 core.c:1592 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 215 52 core.c:1595 adapter_khz_to_speed(): have interface set up
Debug: 216 52 ft2232.c:616 ft2232h_ft4232h_adaptive_clocking(): 97
Debug: 217 52 ft2232.c:675 ft2232_speed(): 86 c7 00
Debug: 218 53 core.c:1592 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 219 53 core.c:1595 adapter_khz_to_speed(): have interface set up
Info : 220 53 core.c:1399 adapter_init(): clock speed 150 kHz
Debug: 221 53 openocd.c:132 handle_init_command(): Debug Adapter init complete
Debug: 222 53 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport init
Debug: 223 53 command.c:145 script_debug(): command - ocd_transport ocd_transport init
Debug: 225 53 transport.c:240 handle_transport_init(): handle_transport_init
Debug: 226 53 ft2232.c:4176 ktlink_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0xff
Debug: 227 53 core.c:719 jtag_add_reset(): SRST line released
Debug: 228 53 core.c:743 jtag_add_reset(): TRST line released
Debug: 229 53 core.c:323 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 230 255 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init
Debug: 231 255 command.c:145 script_debug(): command - ocd_jtag ocd_jtag arp_init
Debug: 232 255 core.c:1412 jtag_init_inner(): Init JTAG chain
Debug: 233 255 core.c:323 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 234 255 core.c:1048 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 235 255 core.c:323 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 236 262 core.c:951 jtag_examine_chain_display(): JTAG tap: stm32l.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : 237 262 core.c:951 jtag_examine_chain_display(): JTAG tap: stm32l.bs tap/device found: 0x06416041 (mfg: 0x020, part: 0x6416, ver: 0x0)
Debug: 238 262 core.c:1208 jtag_validate_ircapture(): IR capture validation scan
Debug: 239 263 core.c:1267 jtag_validate_ircapture(): stm32l.cpu: IR capture 0x01
Debug: 240 263 core.c:1267 jtag_validate_ircapture(): stm32l.bs: IR capture 0x01
Debug: 241 263 openocd.c:145 handle_init_command(): Examining targets...
Debug: 242 263 target.c:1299 target_call_event_callbacks(): target event 21 (examine-start)
Debug: 243 263 arm_adi_v5.c:1097 ahbap_debugport_init():
Debug: 244 267 arm_adi_v5.c:1059 dap_syssec(): DAP: mdmap_init for idcode: 4ba00477
Debug: 245 271 arm_adi_v5.c:956 dap_syssec_kinetis_mdmap(): id doesn't match 00000000 != 0x001C0000
Debug: 246 275 target.c:1917 target_read_u32(): address: 0xe000ed00, value: 0x412fc230
Debug: 247 275 cortex_m.c:1815 cortex_m3_examine(): Cortex-M3 r2p0 processor detected
Debug: 248 275 cortex_m.c:1816 cortex_m3_examine(): cpuid: 0x412fc230
Debug: 249 279 target.c:1917 target_read_u32(): address: 0xe0002000, value: 0x00000261
Debug: 250 279 cortex_m.c:1855 cortex_m3_examine(): FPB fpcr 0x261, numcode 6, numlit 2
Debug: 251 281 target.c:1917 target_read_u32(): address: 0xe0001000, value: 0x40000000
Debug: 252 281 cortex_m.c:1772 cortex_m3_dwt_setup(): DWT dwtcr 0x40000000, comp 4, watch/trigger
Info : 253 281 cortex_m.c:1864 cortex_m3_examine(): stm32l.cpu: hardware has 6 breakpoints, 4 watchpoints
Debug: 254 281 target.c:1299 target_call_event_callbacks(): target event 22 (examine-end)
Debug: 255 281 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash init
Debug: 256 281 command.c:145 script_debug(): command - ocd_flash ocd_flash init
Debug: 258 285 tcl.c:846 handle_flash_init_command(): Initializing flash devices...
Debug: 259 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 260 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 261 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 262 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 263 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 264 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 265 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 266 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 267 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 268 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 269 285 command.c:367 register_command_handler(): registering 'ocd_flash'...
Debug: 270 285 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mflash init
Debug: 271 285 command.c:145 script_debug(): command - ocd_mflash ocd_mflash init
Debug: 273 287 mflash.c:1378 handle_mflash_init_command(): Initializing mflash devices...
Debug: 274 287 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_nand init
Debug: 275 287 command.c:145 script_debug(): command - ocd_nand ocd_nand init
Debug: 277 291 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
Debug: 278 291 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_pld init
Debug: 279 291 command.c:145 script_debug(): command - ocd_pld ocd_pld init
Debug: 281 293 pld.c:207 handle_pld_init_command(): Initializing PLDs...
Debug: 282 293 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset halt
Debug: 283 293 command.c:145 script_debug(): command - reset ocd_reset halt
Debug: 285 295 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 286 295 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 287 295 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-start
Debug: 288 295 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-start
Debug: 289 295 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init-reset
Debug: 290 295 command.c:145 script_debug(): command - ocd_jtag ocd_jtag arp_init-reset
Debug: 291 295 core.c:1520 jtag_init_reset(): Initializing with hard TRST+SRST reset
Debug: 292 295 core.c:732 jtag_add_reset(): JTAG reset with TLR instead of TRST
Debug: 293 295 core.c:323 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 294 295 core.c:1412 jtag_init_inner(): Init JTAG chain
Debug: 295 295 core.c:323 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 296 296 core.c:1048 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 297 296 core.c:323 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 298 301 core.c:951 jtag_examine_chain_display(): JTAG tap: stm32l.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : 299 301 core.c:951 jtag_examine_chain_display(): JTAG tap: stm32l.bs tap/device found: 0x06416041 (mfg: 0x020, part: 0x6416, ver: 0x0)
Debug: 300 301 core.c:1208 jtag_validate_ircapture(): IR capture validation scan
Debug: 301 303 core.c:1267 jtag_validate_ircapture(): stm32l.cpu: IR capture 0x01
Debug: 302 303 core.c:1267 jtag_validate_ircapture(): stm32l.bs: IR capture 0x01
Debug: 303 303 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu cget -chain-position
Debug: 304 303 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu cget -chain-position
Debug: 305 303 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32l.cpu
Debug: 306 303 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32l.cpu
Debug: 307 303 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event examine-start
Debug: 308 303 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event examine-start
Debug: 309 303 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu arp_examine
Debug: 310 303 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu arp_examine
Debug: 311 303 arm_adi_v5.c:1097 ahbap_debugport_init():
Debug: 312 307 arm_adi_v5.c:1059 dap_syssec(): DAP: mdmap_init for idcode: 4ba00477
Debug: 313 311 arm_adi_v5.c:956 dap_syssec_kinetis_mdmap(): id doesn't match 00000000 != 0x001C0000
Debug: 314 311 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event examine-end
Debug: 315 311 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event examine-end
Debug: 316 311 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-assert-pre
Debug: 317 311 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-assert-pre
Debug: 318 311 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu cget -chain-position
Debug: 319 311 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu cget -chain-position
Debug: 320 311 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32l.cpu
Debug: 321 311 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32l.cpu
Debug: 322 311 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu arp_reset assert 1
Debug: 323 311 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu arp_reset assert 1
Debug: 324 311 target.c:1620 target_free_all_working_areas_restore(): freeing all working areas
Debug: 325 311 cortex_m.c:941 cortex_m3_assert_reset(): target->state: halted
Debug: 326 321 cortex_m.c:1024 cortex_m3_assert_reset(): Using Cortex-M3 SYSRESETREQ
Debug: 327 326 cortex_m.c:597 cortex_m3_halt(): target->state: reset
Debug: 328 326 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-assert-post
Debug: 329 326 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-assert-post
Debug: 330 326 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-deassert-pre
Debug: 331 326 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-deassert-pre
Debug: 332 326 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu cget -chain-position
Debug: 333 326 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu cget -chain-position
Debug: 334 326 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32l.cpu
Debug: 335 326 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32l.cpu
Debug: 336 326 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu arp_reset deassert 1
Debug: 337 326 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu arp_reset deassert 1
Debug: 338 326 target.c:1620 target_free_all_working_areas_restore(): freeing all working areas
Debug: 339 326 cortex_m.c:1060 cortex_m3_deassert_reset(): target->state: reset
Debug: 340 326 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-deassert-post
Debug: 341 326 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-deassert-post
Debug: 342 326 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu cget -chain-position
Debug: 343 326 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu cget -chain-position
Debug: 344 326 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32l.cpu
Debug: 345 326 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32l.cpu
Debug: 346 326 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu arp_waitstate halted 1000
Debug: 347 326 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu arp_waitstate halted 1000
Debug: 348 382 cortex_m.c:547 cortex_m3_poll(): Exit from reset with dcb_dhcsr 0x30003
Debug: 349 384 cortex_m.c:233 cortex_m3_endreset_event(): DCB_DEMCR = 0x01000501
Debug: 350 392 target.c:1983 target_write_u32(): address: 0xe0002000, value: 0x00000003
Debug: 351 396 target.c:1983 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 352 401 target.c:1983 target_write_u32(): address: 0xe000200c, value: 0x00000000
Debug: 353 404 target.c:1983 target_write_u32(): address: 0xe0002010, value: 0x00000000
Debug: 354 406 target.c:1983 target_write_u32(): address: 0xe0002014, value: 0x00000000
Debug: 355 408 target.c:1983 target_write_u32(): address: 0xe0002018, value: 0x00000000
Debug: 356 413 target.c:1983 target_write_u32(): address: 0xe000201c, value: 0x00000000
Debug: 357 416 target.c:1983 target_write_u32(): address: 0xe0002020, value: 0x00000000
Debug: 358 418 target.c:1983 target_write_u32(): address: 0xe0002024, value: 0x00000000
Debug: 359 420 target.c:1983 target_write_u32(): address: 0xe0001020, value: 0x00000000
Debug: 360 425 target.c:1983 target_write_u32(): address: 0xe0001024, value: 0x00000000
Debug: 361 428 target.c:1983 target_write_u32(): address: 0xe0001028, value: 0x00000000
Debug: 362 430 target.c:1983 target_write_u32(): address: 0xe0001030, value: 0x00000000
Debug: 363 432 target.c:1983 target_write_u32(): address: 0xe0001034, value: 0x00000000
Debug: 364 437 target.c:1983 target_write_u32(): address: 0xe0001038, value: 0x00000000
Debug: 365 440 target.c:1983 target_write_u32(): address: 0xe0001040, value: 0x00000000
Debug: 366 442 target.c:1983 target_write_u32(): address: 0xe0001044, value: 0x00000000
Debug: 367 444 target.c:1983 target_write_u32(): address: 0xe0001048, value: 0x00000000
Debug: 368 449 target.c:1983 target_write_u32(): address: 0xe0001050, value: 0x00000000
Debug: 369 452 target.c:1983 target_write_u32(): address: 0xe0001054, value: 0x00000000
Debug: 370 454 target.c:1983 target_write_u32(): address: 0xe0001058, value: 0x00000000
Debug: 371 462 cortex_m.c:412 cortex_m3_debug_entry():
Debug: 372 471 cortex_m.c:180 cortex_m3_clear_halt(): NVIC_DFSR 0x9
Debug: 373 480 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0x0
Debug: 374 486 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0x0
Debug: 375 493 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0x0
Debug: 376 498 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x0
Debug: 377 506 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0x0
Debug: 378 512 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x0
Debug: 379 518 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0x0
Debug: 380 524 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0x0
Debug: 381 530 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0x0
Debug: 382 537 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0x0
Debug: 383 542 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0x0
Debug: 384 549 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0x0
Debug: 385 554 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0x0
Debug: 386 561 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0x0
Debug: 387 566 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0xffffffff
Debug: 388 573 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x0
Debug: 389 578 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x0
Debug: 390 585 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0x0
Debug: 391 590 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0x0
Debug: 392 597 cortex_m.c:1478 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x0
Debug: 393 602 cortex_m.c:1478 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 394 609 cortex_m.c:1478 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 395 614 cortex_m.c:1478 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 396 614 cortex_m.c:484 cortex_m3_debug_entry(): entered debug state in core mode: Thread at PC 0x0, target->state: halted
Debug: 397 614 target.c:1299 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 398 614 target.c:1299 target_call_event_callbacks(): target event 1 (halted)
User : 399 614 target.c:1672 target_arch_state(): target state: halted
User : 400 614 armv7m.c:517 armv7m_arch_state(): target halted due to debug-request, current mode: Thread
xPSR: 00000000 pc: 00000000 msp: 00000000
Debug: 401 614 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu curstate
Debug: 402 614 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu curstate
Debug: 403 614 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-end
Debug: 404 614 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-end
Debug: 406 616 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash info 0
Debug: 407 616 command.c:145 script_debug(): command - ocd_flash ocd_flash info 0
Debug: 409 624 target.c:1917 target_read_u32(): address: 0xe0042000, value: 0x10086416
Debug: 410 624 stm32lx.c:475 stm32lx_probe(): device id = 0x10086416
Debug: 411 628 target.c:1941 target_read_u16(): address: 0x1ff8004c, value: 0x0000
Info : 412 628 stm32lx.c:506 stm32lx_probe(): flash size = 0kbytes
Debug: 413 632 target.c:1917 target_read_u32(): address: 0x40023c20, value: 0x00000000
User : 414 632 command.c:547 command_print(): #0 : stm32lx at 0x08000000, size 0x00000000, buswidth 0, chipwidth 0
Debug: 415 634 target.c:1917 target_read_u32(): address: 0xe0042000, value: 0x10086416
User : 416 634 command.c:547 command_print(): stm32lx - Rev: Y
Debug: 417 634 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset run
Debug: 418 634 command.c:145 script_debug(): command - reset ocd_reset run
Debug: 420 638 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 421 638 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 422 638 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-start
Debug: 423 638 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-start
Debug: 424 638 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init-reset
Debug: 425 638 command.c:145 script_debug(): command - ocd_jtag ocd_jtag arp_init-reset
Debug: 426 638 core.c:1520 jtag_init_reset(): Initializing with hard TRST+SRST reset
Debug: 427 638 core.c:732 jtag_add_reset(): JTAG reset with TLR instead of TRST
Debug: 428 638 core.c:323 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 429 639 core.c:1412 jtag_init_inner(): Init JTAG chain
Debug: 430 639 core.c:323 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 431 639 core.c:1048 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 432 639 core.c:323 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 433 644 core.c:951 jtag_examine_chain_display(): JTAG tap: stm32l.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : 434 644 core.c:951 jtag_examine_chain_display(): JTAG tap: stm32l.bs tap/device found: 0x06416041 (mfg: 0x020, part: 0x6416, ver: 0x0)
Debug: 435 644 core.c:1208 jtag_validate_ircapture(): IR capture validation scan
Debug: 436 646 core.c:1267 jtag_validate_ircapture(): stm32l.cpu: IR capture 0x01
Debug: 437 646 core.c:1267 jtag_validate_ircapture(): stm32l.bs: IR capture 0x01
Debug: 438 646 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu cget -chain-position
Debug: 439 646 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu cget -chain-position
Debug: 440 646 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32l.cpu
Debug: 441 646 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32l.cpu
Debug: 442 646 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event examine-start
Debug: 443 646 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event examine-start
Debug: 444 646 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu arp_examine
Debug: 445 646 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu arp_examine
Debug: 446 646 arm_adi_v5.c:1097 ahbap_debugport_init():
Debug: 447 651 arm_adi_v5.c:1059 dap_syssec(): DAP: mdmap_init for idcode: 4ba00477
Debug: 448 654 arm_adi_v5.c:956 dap_syssec_kinetis_mdmap(): id doesn't match 00000000 != 0x001C0000
Debug: 449 654 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event examine-end
Debug: 450 654 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event examine-end
Debug: 451 654 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-assert-pre
Debug: 452 654 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-assert-pre
Debug: 453 654 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu cget -chain-position
Debug: 454 654 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu cget -chain-position
Debug: 455 654 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32l.cpu
Debug: 456 654 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32l.cpu
Debug: 457 654 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu arp_reset assert 0
Debug: 458 654 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu arp_reset assert 0
Debug: 459 654 target.c:1620 target_free_all_working_areas_restore(): freeing all working areas
Debug: 460 654 cortex_m.c:941 cortex_m3_assert_reset(): target->state: halted
Debug: 461 668 cortex_m.c:180 cortex_m3_clear_halt(): NVIC_DFSR 0x1
Debug: 462 676 cortex_m.c:1024 cortex_m3_assert_reset(): Using Cortex-M3 SYSRESETREQ
Debug: 463 678 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-assert-post
Debug: 464 678 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-assert-post
Debug: 465 678 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-deassert-pre
Debug: 466 678 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-deassert-pre
Debug: 467 678 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu cget -chain-position
Debug: 468 678 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu cget -chain-position
Debug: 469 678 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32l.cpu
Debug: 470 678 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32l.cpu
Debug: 471 678 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu arp_reset deassert 0
Debug: 472 678 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu arp_reset deassert 0
Debug: 473 678 target.c:1620 target_free_all_working_areas_restore(): freeing all working areas
Debug: 474 678 cortex_m.c:1060 cortex_m3_deassert_reset(): target->state: reset
Debug: 475 678 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-deassert-post
Debug: 476 678 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-deassert-post
Debug: 477 679 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32l.cpu invoke-event reset-end
Debug: 478 679 command.c:145 script_debug(): command - ocd_stm32l.cpu ocd_stm32l.cpu invoke-event reset-end
Error: 479 733 cortex_m.c:515 cortex_m3_poll(): stm32l.cpu -- clearing lockup after double fault
Debug: 480 739 cortex_m.c:547 cortex_m3_poll(): Exit from reset with dcb_dhcsr 0x30003
Debug: 481 741 cortex_m.c:233 cortex_m3_endreset_event(): DCB_DEMCR = 0x01000000
Debug: 482 749 target.c:1983 target_write_u32(): address: 0xe0002000, value: 0x00000003
Debug: 483 753 target.c:1983 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 484 757 target.c:1983 target_write_u32(): address: 0xe000200c, value: 0x00000000
Debug: 485 759 target.c:1983 target_write_u32(): address: 0xe0002010, value: 0x00000000
Debug: 486 762 target.c:1983 target_write_u32(): address: 0xe0002014, value: 0x00000000
Debug: 487 765 target.c:1983 target_write_u32(): address: 0xe0002018, value: 0x00000000
Debug: 488 767 target.c:1983 target_write_u32(): address: 0xe000201c, value: 0x00000000
Debug: 489 769 target.c:1983 target_write_u32(): address: 0xe0002020, value: 0x00000000
Debug: 490 774 target.c:1983 target_write_u32(): address: 0xe0002024, value: 0x00000000
Debug: 491 777 target.c:1983 target_write_u32(): address: 0xe0001020, value: 0x00000000
Debug: 492 779 target.c:1983 target_write_u32(): address: 0xe0001024, value: 0x00000000
Debug: 493 781 target.c:1983 target_write_u32(): address: 0xe0001028, value: 0x00000000
Debug: 494 786 target.c:1983 target_write_u32(): address: 0xe0001030, value: 0x00000000
Debug: 495 789 target.c:1983 target_write_u32(): address: 0xe0001034, value: 0x00000000
Debug: 496 791 target.c:1983 target_write_u32(): address: 0xe0001038, value: 0x00000000
Debug: 497 793 target.c:1983 target_write_u32(): address: 0xe0001040, value: 0x00000000
Debug: 498 798 target.c:1983 target_write_u32(): address: 0xe0001044, value: 0x00000000
Debug: 499 801 target.c:1983 target_write_u32(): address: 0xe0001048, value: 0x00000000
Debug: 500 803 target.c:1983 target_write_u32(): address: 0xe0001050, value: 0x00000000
Debug: 501 805 target.c:1983 target_write_u32(): address: 0xe0001054, value: 0x00000000
Debug: 502 810 target.c:1983 target_write_u32(): address: 0xe0001058, value: 0x00000000
Debug: 503 819 cortex_m.c:412 cortex_m3_debug_entry():
Debug: 504 827 cortex_m.c:180 cortex_m3_clear_halt(): NVIC_DFSR 0x1
Debug: 505 837 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0x0
Debug: 506 844 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0x0
Debug: 507 849 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0x0
Debug: 508 856 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x0
Debug: 509 861 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0x0
Debug: 510 868 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x0
Debug: 511 873 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0x0
Debug: 512 880 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0x0
Debug: 513 885 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0x0
Debug: 514 892 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0x0
Debug: 515 897 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0x0
Debug: 516 904 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0x0
Debug: 517 909 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0x0
Debug: 518 916 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0xffffffe0
Debug: 519 921 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0xfffffff9
Debug: 520 928 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x0
Debug: 521 933 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x3
Debug: 522 940 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0xffffffe0
Debug: 523 945 cortex_m.c:1447 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0x0
Debug: 524 952 cortex_m.c:1478 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x0
Debug: 525 957 cortex_m.c:1478 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 526 964 cortex_m.c:1478 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 527 969 cortex_m.c:1478 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 528 977 cortex_m.c:397 cortex_m3_examine_exception_reason(): HardFault SHCSR 0x0, SR 0x40000000, CFSR 0x21000, AR 0xffffffff
Debug: 529 977 cortex_m.c:484 cortex_m3_debug_entry(): entered debug state in core mode: Handler at PC 0x0, target->state: halted
Debug: 530 977 target.c:1299 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 531 977 target.c:1299 target_call_event_callbacks(): target event 1 (halted)
User : 532 977 target.c:1672 target_arch_state(): target state: halted
User : 533 977 armv7m.c:517 armv7m_arch_state(): target halted due to debug-request, current mode: Handler HardFault
xPSR: 0x00000003 pc: 00000000 msp: 0xffffffe0
User : 534 977 target.c:2241 handle_target(): Polling target failed, GDB will be halted. Polling again in 100ms
Debug: 535 977 target.c:1299 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 536 977 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_shutdown
Debug: 537 977 command.c:145 script_debug(): command - shutdown ocd_shutdown
User : 539 977 server.c:580 handle_shutdown_command(): shutdown command invoked
Debug: 540 977 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 541 977 command.c:145 script_debug(): command - init ocd_init
User : 542 982 target.c:2251 handle_target(): Polling succeeded again