Hi,
I am using OpenOCD with oocdlink (FT2232D based) to program/debug
code on Olimex’s LPC-H2103 board. Unless I confused, OpenOCD corrupts
application code when it downloads the code to the device flash.
Command verify_image “naturally” fails on LPC2000 (my understanding
of several posts I have googled) so I compared .bin file and the output
of dump_image command. At least the first 48 bytes of .bin file (used for
programming) are differ from corresponding bytes of the file created by
dump_image command. I also was able to see corrupted portion of
sturtup code using GDB.
I would appreciate some help with this issue.
OpenOCD was built from r1171 source on MacOSX 10.5.4 (Intel) with
libftd2xx v 0.1.4.
Command to download code is:
openocd -f openocd.cfg -c “mt_flash_bin app.bin 0” -c “reset run” -c shutdown
Configuration file is:
Configuration file is based on “Accessing ARM-Controllers with OpenOCD”
http://www.siwawi.arubi.uni-kl.de/avr_p … index.html
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface ft2232
ft2232_device_desc “Dual RS232 A”
ft2232_layout “oocdlink”
ft2232_vid_pid 0x0403 0x6010
ft2232_latency 2
jtag_speed 5
slow and verbose during init:
#debug_level 3
fast disable
#jtag_speed 1
delays on reset lines
jtag_nsrst_delay 200
jtag_ntrst_delay 200
use combined on interfaces or targets that can’t set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
jtag scan chain
jtag_device 4 0x1 0xf 0xe
target settings
target arm7tdmi little 0 arm7tdmi-s_r4
scipts/macros/user commands - this is TCL (variant JIM):
proc mt_internal_rc {} {
jtag_khz 100
reset run
sleep 100
reset halt
wait_halt 2
PLL disconnect PLLCON
mww 0xE01FC080 0x01
mww 0xE01FC08C 0xAA
mww 0xE01FC08C 0x55
PLL disable PLLCON
mww 0xE01FC080 0x00
mww 0xE01FC08C 0xAA
mww 0xE01FC08C 0x55
no prescaler CCLKCFG
mww 0xE01FC104 0x00
internal RC CLKSRCSEL
mww 0xE01FC10C 0x00
main oscil. CLKSRCSEL
mww 0xE01FC10C 0x01
remap to internal flash
mww 0xE01FC040 0x01
sleep 100
jtag_khz 500
flash probe 0
}
proc mt_flash_bin {IMGFILE OFFSET} {
mt_internal_rc
flash write_image erase $IMGFILE $OFFSET
sleep 100
verify_image $IMGFILE $OFFSET
sleep 100
}
proc mt_flash {IMGFILE} {
mt_internal_rc
flash write_image erase $IMGFILE
sleep 100
verify_image $IMGFILE
sleep 100
}
mthomas - note taken from the lpc2148 file in the OpenOCD target library:
NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
JTAG, power-on reset is not enough, i.e. you need to perform a
reset before being able to talk to the LPC2148, attach is not
possible.
proc target_0_post_reset {} {
Force target into ARM state
soft_reset_halt
do not remap 0x0000-0x0020 to anything but the flash
mwb 0xE01FC040 0x01
}
working area in RAM
working_area 0 0x40000000 0x10000 nobackup
#flash bank lpc2000 0 0 [calc_checksum] - fails
n.b.: the target is switched to the internal RC (nom. 4MHz)
before flashing with the supplied commands so this is the frequency
given as parameter
flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 4000 calc_checksum
gdb_flash_program enable
gdb_memory_map enable
gdb_breakpoint_override hard
init
fast enable
jtag_khz 500
debug_level 1