OpenOCD startup problems: unknown EmbeddedICE, Flash erase_.

Development Boards MicroMod
1

Hi,

I’m new to the world of ARM, I have bought an LPC-H2103 Header Board and a JTAG USB OCD Tiny.

As I am using Ubuntu 9.10, I compiled the GNU-ARM toolchain like in the tutorial in the Ubuntu Wiki.

Then I downloaded & installed libftdi-0.17, ftdi-eeprom-0.3 and the sources of OpenOCD 0.4.0 from the Sourceforge site. I configured with

./configure --enable-ft2232_libftdi --enable-usbprog --enable-arm-jtag-ew --disable-doxygen-html --enable-doxygen-pdf --disable-gccwarnings --disable-wextra --disable-werror

Then I did the usual make install and everything looked fine.

Then I downloaded the LPC2103 sample by Benedict Sauter: [LPC2103 and Linux (with Blink-Example) and compiled it. Sofar no problem.

Since I do not use a parallel port debugger, I did not use the script provided in the tutorial, but the sripts provided in /usr/share/openocd/scripts/target/lpc2103.cfg and /usr/share/openocd/scripts/interface/olimex-jtag-tiny.cfg.

lpc2103.cfg:

# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal

if { [info exists CHIPNAME] } {	
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME lpc2103
}

if { [info exists ENDIAN] } {
   set _ENDIAN $ENDIAN
} else {
   set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x9f3f1f1f # (MOX) cputapid changed from 0x4f1f0f0f because this is, what was detected by OpenOCD
}

# LPC2000 -> SRST causes TRST
reset_config trst_and_srst srst_pulls_trst

# reset delays
jtag_nsrst_delay 100
jtag_ntrst_delay 100

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4

# 8kB of internal SRAM
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0

# 32kB of internal Flash, core clocked with 12MHz crystal
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
#flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 12000 calc_checksum   # (MOX) line not working, see: http://forum.sparkfun.com/viewtopic.php?f=18&t=18539

#flash bank <name> <driver> <base> <size> <chip_width> <bus_width> <target#>    <variant>  <clock> [calc_checksum]
flash bank lpc2000 lpc2000  0      524288 32           32          $_TARGETNAME lpc2000_v2 25000

and olimex-jtag-tiny.cfg:

#
# Olimex ARM-USB-TINY
#
# http://www.olimex.com/dev/arm-usb-tiny.html
#

interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG TINY A"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x0004

Now, when I open up OpenOCD by ```
openocd -f /usr/share/openocd/scripts/interface/olimex-jtag-tiny.cfg -f /usr/share/openocd/scripts/target/lpc2103.cfg

Open On-Chip Debugger 0.4.0 (2010-03-08-23:43)
Licensed under GNU GPL v2
For bug reports, read
OpenOCD - Open On-Chip Debugger - berlios.de
trst_and_srst srst_pulls_trst srst_gates_jtag trst_push_pull srst_open_drain
jtag_nsrst_delay: 100
jtag_ntrst_delay: 100
Info : clock speed 6000 kHz
Info : JTAG tap: lpc2103.cpu tap/device found: 0x9f3f1f1f (mfg: 0x78f, part: 0xf3f1, ver: 0x9)
Info : Embedded ICE version 8
Error: unknown EmbeddedICE version (comms ctrl: 0x80000000)
Info : lpc2103.cpu: hardware has 2 breakpoint/watchpoint units


Then I connect by localhost and try a few commands:

mox@Donermafia:~$ telnet localhost 4444
Trying ::1…
Trying 127.0.0.1…
Connected to localhost.
Escape character is ‘^]’.
Open On-Chip Debugger

reset halt
JTAG tap: lpc2103.cpu tap/device found: 0x9f3f1f1f (mfg: 0x78f, part: 0xf3f1, ver: 0x9)
srst pulls trst - can not reset into halted mode. Issuing halt after reset.
invalid mode value encountered 0
cpsr contains invalid mode value - communication failure
TARGET: lpc2103.cpu - Not halted
Command handler execution failed
in procedure ‘reset’ called at file “command.c”, line 650
called at file “command.c”, line 361
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
invalid mode value encountered 15
cpsr contains invalid mode value - communication failure
ThumbEE – incomplete support
target state: halted
target halted in ThumbEE state due to debug-request, current mode: IRQ
cpsr: 0xf1f1f9f2 pc: 0xf1f1f9ec
flash probe 0
flash ‘lpc2000’ found at 0x00000000
flash info 0
#0 : lpc2000 at 0x00000000, size 0x00080000, buswidth 32, chipwidth 32
# 0: 0x00000000 (0x1000 4kB) protected
# 1: 0x00001000 (0x1000 4kB) protected
# 2: 0x00002000 (0x1000 4kB) protected
# 3: 0x00003000 (0x1000 4kB) protected
# 4: 0x00004000 (0x1000 4kB) protected
# 5: 0x00005000 (0x1000 4kB) protected
# 6: 0x00006000 (0x1000 4kB) protected
# 7: 0x00007000 (0x1000 4kB) protected
# 8: 0x00008000 (0x8000 32kB) protected
# 9: 0x00010000 (0x8000 32kB) protected
# 10: 0x00018000 (0x8000 32kB) protected
# 11: 0x00020000 (0x8000 32kB) protected
# 12: 0x00028000 (0x8000 32kB) protected
# 13: 0x00030000 (0x8000 32kB) protected
# 14: 0x00038000 (0x8000 32kB) protected
# 15: 0x00040000 (0x8000 32kB) protected
# 16: 0x00048000 (0x8000 32kB) protected
# 17: 0x00050000 (0x8000 32kB) protected
# 18: 0x00058000 (0x8000 32kB) protected
# 19: 0x00060000 (0x8000 32kB) protected
# 20: 0x00068000 (0x8000 32kB) protected
# 21: 0x00070000 (0x8000 32kB) protected
# 22: 0x00078000 (0x1000 4kB) protected
# 23: 0x00079000 (0x1000 4kB) protected
# 24: 0x0007a000 (0x1000 4kB) protected
# 25: 0x0007b000 (0x1000 4kB) protected
# 26: 0x0007c000 (0x1000 4kB) protected
lpc2000 flash driver variant: 1, clk: 25000kHz
flash protect 0 0 26 off
cleared protection for sectors 0 through 26 on flash bank 0
flash erase_sector 0 0 26
timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: 0
Write memory at address 0x40000000 failed (check work_area definition)
lpc2000 prepare sectors returned -302
failed erasing sectors 0 to 26 (-902)


So now I have two questions:

1.) What does

Info : Embedded ICE version 8

Error: unknown EmbeddedICE version (comms ctrl: 0x80000000)

mean, and is it important/how do I fix it?

2.) Why can't I erase the flash of my µC? And how can I programm the chip?

Any advice is welcome, I have looked through this forum, google, and some other related forums ([http://www.mikrocontroller.net](http://www.mikrocontroller.net) & [http://www.embeddedrelated.com/groups/lpc2000/2.php](http://www.embeddedrelated.com/groups/lpc2000/2.php))

Thanks in advance,

Mox](http://www.eproo.de/index.php?page_id=94)
2

solved

Hi,

I just found out, what caused the problem and I am able to erase the flash of my lpc2103.

The trick is to add one line to the setup of OpenOCD, I chose the lpc2103.cfg. This “magic” line is:

jtag_khz 1 # might also be faster, I have not tested it yet...

When I started up OpenOCD with this line, it first reportet that my CPUTAPID (0x9f3f1f1f, see original post) was wrong and instead detected 0x4f1f0f0f as it should be. Further, the embeddedICE is now detected as version 4 and does not cause any more trouble. Then later, when resetting the lpc, I did not get any more communication errors (again, see original post).

So now, my lpc2103.cfg looks like this:

# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal

if { [info exists CHIPNAME] } {	
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME lpc2103
}

if { [info exists ENDIAN] } {
   set _ENDIAN $ENDIAN
} else {
   set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x4f1f0f0f
}

# LPC2000 -> SRST causes TRST
reset_config trst_and_srst srst_pulls_trst

# reset delays
jtag_nsrst_delay 100
jtag_ntrst_delay 100
jtag_khz 1		# slow down jtag-connection to avoid errors

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4

# 8kB of internal SRAM
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0

# 32kB of internal Flash, core clocked with 12MHz crystal
# flash bank lpc2000 <base> <size> 0 0 <target#> <variant>  <clock> [calc_checksum]
# flash bank lpc2000 0x0    0x8000 0 0 0         lpc2000_v2 12000   calc_checksum   #line not working, see: http://forum.sparkfun.com/viewtopic.php?f=18&t=18539 <seize>: 524288

#flash bank <name> <driver> <base> <size> <chip_width> <bus_width> <target#>    <variant>  <clock> [calc_checksum]
flash bank lpc2000 lpc2000  0      0x8000 32           32          $_TARGETNAME lpc2000_v2 60000

I hope this will help some beginners.

greetings,

Mox

3

This cannot help anyone… OpenOCD manual explicitly says, that the JTAG clock has to be at least 6x (in reality at least 8x) slower than the core clock. You should notice, that without any speed configuration the JTAG runs at max speed - 6MHz here, so the core should be running FROM RESET at ~50MHz, which (I bet) it does not. You should specify some NORMAL speed, not 1kHz. If you don’t know why, try flashing / debugging with that speed. Writing a few kB of code would take hours…

4/3!!

4

Well, you are right in that it takes forever, and by now I have tuned that speed up by quite a bit.

BUT: When using only the scripts supplied with OpenOCD 0.4.0 this speed restriction was not involved and unless one knows about it (and not everybody will immediately know what is wrong by seeing those errors for the first time) it can be quite a long search. So I guess this could help people starting with this setup for the first time. And mind You, I’d rather do slow downloads, than none at all :wink:

5

This thread ended a day of frustration for me with the Unknown EmbeddedIce error. My very old cfgs for an LPC2119 didn’t know the new jtag_khz command. (I think it used to be jtag_speed or some such). Thanks guys!

6

jtag_khz, what exactly is that command? I am trying to come up with a few things on my own and this seems like it could be a puzzle piece that looms larger than the board. I have been programming a large variety of electronic devices recently, including some wood moisture meter modifications. Have you guys heard of [www.wagnermeters.com?](http://www.rhspec.com)