Program LPC2148 Flash ROM using OpenOCD? [Solved]

Development Boards MicroMod
1

Hey All,

I thought I might find an existing topic about this but haven’t been able to! After in the past few days succesfully following the Yagarto (http://www.yagarto.de/) howto and getting everything installed, I now want to be able to load/debug my programs in flash :slight_smile:

I’m using the LPC-P2148 dev board and ARM-USB-OCD .

Another post pointed me in the direction of: http://www.siwawi.arubi.uni-kl.de/avr_p … index.html

which admittedly seemed very helpful. But after reading, downloading, and tweaking the files, I’ve been unable to get it going!

The example program seems to build fine, but when I attempt to run openocd_go_flash.cmd I get the msg:

Error: lpc2000.c:384 lpc2000_flash_bank_command(): unknown LPC2000 variant
Error: flash.c:180 handle_flash_bank_command(): ‘lpc2000’ driver rejected flash bank at 0x00000000

had a poke around but couldn’t work out what was causing this one. If anyone can see the cause of that problem, or any other ones in my config that’d be awesome.

openocd_go_flash.cmd

@echo off
call openocd_install_info.cmd

if %OOCD_INTERFACE% == PP goto LAB_PP
if %OOCD_INTERFACE% == FTDI goto LAB_FTDI
echo ERROR - set interface in openocd_install_info
goto LAB_END


:LAB_FTDI
set OOCD_EXE=%OOCD_BIN_FTDI%
set OOCD_CFG=openocd_lpc2148_flash_ftdi.cfg
goto LAB_DOIT


:LAB_PP
set OOCD_EXE=%OOCD_BIN_PP%
set OOCD_CFG=openocd_lpc2148_flash_wiggler.cfg


:LAB_DOIT
rem set OOCD_DBG=-d 1

%OOCD_EXE% %OOCD_DBG% -f %OOCD_CFG% -d3 -lopenocd.log


:LAB_END

rem pause

openocd_install_info.cmd

rem -
set OOCD_INSTALLDIR=C:\openocd-2007re204\bin
set OOCD_BIN_FTDI=%OOCD_INSTALLDIR%\openocd-ftd2xx.exe
set OOCD_BIN_PP=%OOCD_INSTALLDIR%\openocd-pp.exe

rem The used interface either FTDI(=WinARM-JTAG, JTAGKEY etc.) or PP(="Wiggler")
set OOCD_INTERFACE=FTDI
rem set OOCD_INTERFACE=PP

openocd_lpc2148_flash_ftdi.cfg

#daemon configuration
telnet_port 4444
gdb_port 3333

#interface
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG A"
ft2232_layout "olimex-jtag"
ft2232_vid_pid 0x15BA 0x0003
jtag_speed 3

#interface
#interface ft2232
#ft2232_device_desc "Amontec JTAGkey A"
#ft2232_layout jtagkey
#ft2232_vid_pid 0x0403 0xcff8
#jtag_speed 3
jtag_nsrst_delay 200
jtag_ntrst_delay 200

#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst

#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe

#target configuration
daemon_startup reset

#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
run_and_halt_time 0 30

# flash-options LPC2148
target_script 0 reset openocd_lpc2148_flash.script
working_area 0 0x40000000 0x4000 nobackup
# LPC2138 @ 12MHz / 0x7D000 from 500*1024 (not 512!)
flash bank lpc2000 0x0 0x7D000 0 0 lpc2000_v2 0 12000 calc_checksum

openocd_lpc2148_flash.script

arm7_9 dcc_downloads enable
wait_halt
sleep 10
poll
flash probe 0
flash erase 0 0 0
flash write_binary 0 main.bin 0x0
reset run
sleep 10
shutdown

openocd.log

Error:   lpc2000.c:384 lpc2000_flash_bank_command(): unknown LPC2000 variant
Error:   flash.c:180 handle_flash_bank_command(): 'lpc2000' driver rejected flash bank at 0x00000000
Debug:   jtag.c:1407 jtag_init(): -
Debug:   ft2232.c:1296 ft2232_init_ftd2xx(): 'ft2232' interface using FTD2XX with 'olimex-jtag' layout (15ba:0003)
Debug:   ft2232.c:1385 ft2232_init_ftd2xx(): current latency timer: 2
Debug:   ft2232.c:1732 olimex_jtag_init(): 80 08 1b
Debug:   ft2232.c:1775 olimex_jtag_init(): 82 09 0f
Debug:   ft2232.c:253 ft2232_speed(): 86 03 00
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   jtag.c:1291 jtag_examine_chain(): JTAG device found: 0x4f1f0f0f (Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   openocd.c:113 main(): jtag init complete
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST released
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 0
Debug:   embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000005
Debug:   arm7_9_common.c:707 arm7_9_assert_reset(): target->state: unknown
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: SRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Warning: arm7_9_common.c:734 arm7_9_assert_reset(): srst resets test logic, too
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: SRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   ft2232.c:993 olimex_jtag_reset(): trst: 1, srst: 1, high_output: 0x02, high_direction: 0x0f
Debug:   ft2232.c:993 olimex_jtag_reset(): trst: 1, srst: 1, high_output: 0x02, high_direction: 0x0f
Debug:   arm7_9_common.c:773 arm7_9_deassert_reset(): target->state: reset
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: SRST released
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   ft2232.c:993 olimex_jtag_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0x0f
Debug:   openocd.c:117 main(): target init complete
Debug:   openocd.c:121 main(): flash init complete
Debug:   openocd.c:125 main(): NAND init complete
Debug:   openocd.c:129 main(): pld init complete
Debug:   gdb_server.c:1451 gdb_init(): gdb service for target arm7tdmi at port 3333
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST released
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   arm7_9_common.c:929 arm7_9_halt(): target->state: running
Debug:   embeddedice.c:384 embeddedice_write_reg(): 9: 0xffffffff
Debug:   embeddedice.c:384 embeddedice_write_reg(): 11: 0xffffffff
Debug:   embeddedice.c:384 embeddedice_write_reg(): 12: 0x00000100
Debug:   embeddedice.c:384 embeddedice_write_reg(): 13: 0x000000f7
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug:   arm7_9_common.c:671 arm7_9_poll(): DBGACK set, dbg_state->value: 0x9
Debug:   embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000005
Debug:   embeddedice.c:384 embeddedice_write_reg(): 12: 0x00000000
Debug:   arm7_9_common.c:1047 arm7_9_debug_entry(): target entered debug from ARM state
Debug:   arm7_9_common.c:1079 arm7_9_debug_entry(): target entered debug state in Undefined mode
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r0: 0x00000020
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r1: 0x40000200
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r2: 0x00000067
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r3: 0x00000024
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r4: 0x00000000
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r5: 0xe01fc040
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r6: 0x9e67fd9e
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r7: 0x067ba725
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r8: 0xa2e81794
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r9: 0x00000000
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r10: 0x2109a2da
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r11: 0x40007ed8
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r12: 0x40007edc
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r13: 0x40007ecc
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r14: 0x000001e0
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r15: 0x000002f4
Debug:   arm7_9_common.c:1114 arm7_9_debug_entry(): entered debug state at PC 0x2f4
Debug:   target.c:469 target_call_event_callbacks(): target event 0

If there’s any more info needed just let me know. Cheers.

-Shane.

2

If you are using an version R189 or greater the syntax has changed

flash bank lpc2000 0x0 0x7D000 0 0 lpc2000_v2 0 12000 calc_checksum

becomes

flash bank lpc2000 0x0 0x7D000 0 0 0 lpc2000_v2 12000 calc_checksum

Ben

3

Hey Ben,

Cheers for that. No longer get the Error. Now I had to just work out why the program didn’t run after I launched openocd_go_flash.cmd. I still don’t know, but it might have something to do with the fact that my main.bin file is 1,073,753,344 bytes! Something tells me that’s not going to fit in the ROM.

Does anyone have any clues as to what could cause this? I’ve attached my Main and Makefile.

tmrtest.c

int main (void)
{
	int flip;
	DWORD lasttime, now;

	/************ The main Function is an endless loop ************/
	/* The timer routine is tested on the Keil MCB214x board */
	
	// ...and on an Keil MCB2130 by Martin Thomas
        //... And modded for Olimex LPC-P2148 by Shaneo.

	
	IODIR0 |= 0x00000c00;	// P0.10 & P0.11 output
	IOSET0 =  0x00000c00;
	
	//IODIR1 = 0x00FF0000;		/* P1.16..23 defined as Outputs */
	//IOCLR1 = 0x00FF0000;		/* turn off all the LEDs */
	//IOSET1 = 0x00AA0000;        /* turn on some LEDs to indicate start */

	init_VIC();
	init_timer();
	
	enable_timer( 0 );
	
	flip = 0;
	lasttime = timer_counter;
	
	while (1) {	/* Loop forever */
		now = timer_counter;
		if ( (DWORD)(now-lasttime) > 0x100 ) {
			lasttime = now;
			if (flip == 0) {
				IOSET0 = 0x00000800;
				IOCLR0 = 0x00000400;
				//IOSET1 = 0x000F0000;	/* turn off P1.20~23 */	
				//IOCLR1 = 0x00F00000;	/* turn on P1.16~19 */
				flip = 1;
			}
			else {
				IOSET0 = 0x00000400;
				IOCLR0 = 0x00000800;
				//IOSET1 = 0x00F00000;	/* turn on P1.20~23 */
				//IOCLR1 = 0x000F0000;	/* turn off P1.16~19 */
				flip = 0;
			}
		}
	}
	return 0;
}

Unfortunately when I try and include my Makefile here the forum gives me an Internal Server Error: “The server encountered an internal error or misconfiguration and was unable to complete your request. Your administrator may not have enabled CGI access for this directory.”

Any ideas (about my .bin file)? If I need to post more info just let me know.

Cheers,

-Shane.

4

Ok…

Using another source file designed to run from Flash, whose makefile actually generates a reasonable main.bin file, my openocd_go_flash.cmd runs fine (log file attached), but the program still doesn’t launch? Or doesn’t appear to, all it is supposed to do is blink some LED’s. I’m hoping this is just some n00b point that i’ve missed.

hope someone can help.

-Shaneo.

**openocd.log** 
Debug:   jtag.c:1407 jtag_init(): -
Debug:   ft2232.c:1296 ft2232_init_ftd2xx(): 'ft2232' interface using FTD2XX with 'olimex-jtag' layout (15ba:0003)
Debug:   ft2232.c:1385 ft2232_init_ftd2xx(): current latency timer: 2
Debug:   ft2232.c:1732 olimex_jtag_init(): 80 08 1b
Debug:   ft2232.c:1775 olimex_jtag_init(): 82 09 0f
Debug:   ft2232.c:253 ft2232_speed(): 86 03 00
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   jtag.c:1291 jtag_examine_chain(): JTAG device found: 0x4f1f0f0f (Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   openocd.c:113 main(): jtag init complete
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST released
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 0
Debug:   embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000005
Debug:   arm7_9_common.c:707 arm7_9_assert_reset(): target->state: unknown
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: SRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Warning: arm7_9_common.c:734 arm7_9_assert_reset(): srst resets test logic, too
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: SRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   ft2232.c:993 olimex_jtag_reset(): trst: 1, srst: 1, high_output: 0x02, high_direction: 0x0f
Debug:   ft2232.c:993 olimex_jtag_reset(): trst: 1, srst: 1, high_output: 0x02, high_direction: 0x0f
Debug:   arm7_9_common.c:773 arm7_9_deassert_reset(): target->state: reset
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: SRST released
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   ft2232.c:993 olimex_jtag_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0x0f
Debug:   openocd.c:117 main(): target init complete
Debug:   openocd.c:121 main(): flash init complete
Debug:   openocd.c:125 main(): NAND init complete
Debug:   openocd.c:129 main(): pld init complete
Debug:   gdb_server.c:1451 gdb_init(): gdb service for target arm7tdmi at port 3333
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug:   jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST released
Debug:   jtag.c:1197 jtag_reset_callback(): -
Debug:   arm7_9_common.c:929 arm7_9_halt(): target->state: running
Debug:   embeddedice.c:384 embeddedice_write_reg(): 9: 0xffffffff
Debug:   embeddedice.c:384 embeddedice_write_reg(): 11: 0xffffffff
Debug:   embeddedice.c:384 embeddedice_write_reg(): 12: 0x00000100
Debug:   embeddedice.c:384 embeddedice_write_reg(): 13: 0x000000f7
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug:   embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug:   arm7_9_common.c:671 arm7_9_poll(): DBGACK set, dbg_state->value: 0x9
Debug:   embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000005
Debug:   embeddedice.c:384 embeddedice_write_reg(): 12: 0x00000000
Debug:   arm7_9_common.c:1047 arm7_9_debug_entry(): target entered debug from ARM state
Debug:   arm7_9_common.c:1079 arm7_9_debug_entry(): target entered debug state in Undefined mode
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r0: 0x00000020
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r1: 0x40000200
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r2: 0x00000067
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r3: 0x00000024
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r4: 0x00000000
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r5: 0xe01fc040
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r6: 0x9e67fd9e
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r7: 0x0e7fa625
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r8: 0xa2e81795
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r9: 0x00000000
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r10: 0x2109a2da
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r11: 0x40007ed8
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r12: 0x40007edc
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r13: 0x40007ecc
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r14: 0x000001e0
Debug:   arm7_9_common.c:1108 arm7_9_debug_entry(): r15: 0x000002f4
Debug:   arm7_9_common.c:1114 arm7_9_debug_entry(): entered debug state at PC 0x2f4
Debug:   target.c:469 target_call_event_callbacks(): target event 0
5

Found it!

After getting increasingly desperate I thought it’d be an idea to read the openOCD documentation, and after plodding through the intricacies of how JTAG works, I got to the part about the config file… And something jumped out at me:

openocd_lpc2148_flash_ftdi.cfg

#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
run_and_halt_time 0 30

Should be:

target arm7tdmi little run_and_init 0 arm7tdmi-s_r4
run_and_halt_time 0 30

Which it was in the original code I downloaded from the link in my first post, except I “tweaked” it without actually understanding what that config parameter does! Smart hey? :oops:

But after changing that my LPC-P2148 has too little LED’s blinking at me, and I got to do my happy dance. :smiley:

If anyone wants the complete files PM me.

-Shane.