Hi,
OpenOCD 0.5 was working fine, but for some reason it now fails despite no change to the config that I have been using. I’d really appreciate any ideas as to why this could be.
OpenOCD is built from source, on a WinXP/Cygwin platform, and latest FTDI drivers (using patched .inf files for the Olimex VID/PID). The programmer is an Olimex ARM-USB-OCD and the target is an Olimex STM32-H103 board.
As far as I can see there is no actual error reported, except the output says “wrote 0 bytes from file blah.bin …”
$ ls -l blinky.bin
-rwxr-xr-x+ 1 user None 932 Nov 5 02:21 blinky.bin
$ openocd -f /usr/local/share/openocd/scripts/interface/arm-usb-ocd.cfg -f /usr/local/share/openocd/scripts/board/olime
x_stm32_h103.cfg -f blinky.openocd
Open On-Chip Debugger 0.5.0 (2011-10-17-00:53)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
1000 kHz
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
cortex_m3 reset_config sysresetreq
Info : device: 4 "2232C"
Info : deviceID: 364511235
Info : SerialNumber: FTSM47CJA
Info : Description: Olimex OpenOCD JTAG A
Info : clock speed 1000 kHz
Info : JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
Info : JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1)
Info : stm32.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
Info : JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1)
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800010c msp: 0x20005000
auto erase enabled
Info : device id = 0x20036410
Info : flash size = 128kbytes
wrote 0 bytes from file blinky.bin in 0.008000s (0.000 KiB/s)
Info : JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
Info : JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1)
shutdown command invoked
$ cat blinky.openocd
init
reset halt
#flash write_image erase blinky.hex 0 ihex
flash write_image erase blinky.bin 0 bin
reset
shutdown
$ cat /usr/local/share/openocd/scripts/interface/arm-usb-ocd.cfg
#
# Olimex ARM-USB-OCD
#
# http://www.olimex.com/dev/arm-usb-ocd.html
#
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG"
ft2232_layout "olimex-jtag"
ft2232_vid_pid 0x15BA 0x0003
$ cat /usr/local/share/openocd/scripts/board/olimex_stm32_h103.cfg
# Olimex STM32-H103 eval board
# http://olimex.com/dev/stm32-h103.html
# Work-area size (RAM size) = 20kB for STM32F103RB device
set WORKAREASIZE 0x5000
source [find target/stm32f1x.cfg]
$ cat /usr/local/share/openocd/scripts/target/stm32f1x.cfg
# script for stm32
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME stm32
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x4000
}
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
adapter_khz 1000
adapter_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# See STM Document RM0008
# Section 26.6.3
set _CPUTAPID 0x3ba00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
# FIXME this never gets used to override defaults...
set _BSTAPID $BSTAPID
} else {
# See STM Document RM0008
# Section 29.6.2
# Low density devices, Rev A
set _BSTAPID1 0x06412041
# Medium density devices, Rev A
set _BSTAPID2 0x06410041
# Medium density devices, Rev B and Rev Z
set _BSTAPID3 0x16410041
set _BSTAPID4 0x06420041
# High density devices, Rev A
set _BSTAPID5 0x06414041
# Connectivity line devices, Rev A and Rev Z
set _BSTAPID6 0x06418041
# XL line devices, Rev A
set _BSTAPID7 0x06430041
}
jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
-expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
-expected-id $_BSTAPID6 -expected-id $_BSTAPID7
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m3 reset_config sysresetreq
$