Here’s some curious code that gcc or the linker puts after the return statement in an IRQ handler. Is this pipe line stuffing??
248: e25ef004 subs pc, lr, #4 ; 0x4
24c: 40000124 andmi r0, r0, r4, lsr #2
250: 40000120 andmi r0, r0, r0, lsr #2
Thanks
Here’s some curious code that gcc or the linker puts after the return statement in an IRQ handler. Is this pipe line stuffing??
248: e25ef004 subs pc, lr, #4 ; 0x4
24c: 40000124 andmi r0, r0, r4, lsr #2
250: 40000120 andmi r0, r0, r0, lsr #2
Thanks
The first line alone is the standard way to return from an ARM interrupt. Execution does not continue past that point.
The other two lines make no sense as code, so they’re probably just constants being referred to from elsewhere in the code. That’s quite commonly needed on the ARM, since there’s no way to include an arbitrary 32-bit value in an instruction that is itself only 32 bits wide.
Those constants may be addresses that are loaded into a pointer to point to RAM ???