Problem with OpenOCD 0.4.0 and STR911

Hello, I have problem with STR911FM44 microcontroller debugging with OpenOCD 0.4.0, Eclipse and Amontec JTAGkey based programmer.

Here is the report from GDB:

Open On-Chip Debugger 0.4.0 (2010-02-22-19:05)
Licensed under GNU GPL v2
For bug reports, read
   http://openocd.berlios.de/doc/doxygen/bugs.html
RCLK - adaptive
jtag_nsrst_delay: 100
jtag_ntrst_delay: 100
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
Warn : str911.flash: nonstandard IR mask
Warn : str911.bs: nonstandard IR mask
Info : RCLK (adaptive clock speed) not supported - fallback to 10 kHz
Info : JTAG tap: str911.flash tap/device found: 0x04570041 (mfg: 0x020, part: 0x4570, ver: 0x0)
Info : JTAG tap: str911.cpu tap/device found: 0x25966041 (mfg: 0x020, part: 0x5966, ver: 0x2)
Info : JTAG tap: str911.bs tap/device found: 0x2457f041 (mfg: 0x020, part: 0x457f, ver: 0x2)
Info : Embedded ICE version 6
Info : str911.cpu: hardware has 2 breakpoint/watchpoint units
Info : accepting 'gdb' connection from 0
Warn : acknowledgment received, but no packet pending
RCLK not supported - fallback to 10 kHz
Info : JTAG tap: str911.flash tap/device found: 0x04570041 (mfg: 0x020, part: 0x4570, ver: 0x0)
Info : JTAG tap: str911.cpu tap/device found: 0x25966041 (mfg: 0x020, part: 0x5966, ver: 0x2)
Info : JTAG tap: str911.bs tap/device found: 0x2457f041 (mfg: 0x020, part: 0x457f, ver: 0x2)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
RCLK not supported - fallback to 1000 kHz
cleared protection for sectors 0 through 7 on flash bank 0
Warn : NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type 'help dcc'.
Warn : NOTE! Severe performance degradation without fast memory access enabled. Type 'help fast'.
Warn : memory read caused data abort (address: 0xe8a2b108, size: 0x4, count: 0x1)

And here is my linker script:

/*
	Program in flash memory
*/


/* memory configuration */

MEMORY
{
  CODE (rx) :  ORIGIN = 0x00000000, LENGTH = 512K
  DATA (rwx) : ORIGIN = 0x04000000, LENGTH = 96K
}


/* Sections definitions */

SECTIONS
{

  /* section .text contains the code */
  . = 0;	
  .text :
  {
    KEEP(*(.vectrom))        /* added by mthomas */
    KEEP(*(.init))
    *(.text)                   /* remaining code */
    *(.text.*)
    *(.glue_7t) 
    *(.glue_7)
    *(.gnu.linkonce.t.*)
    KEEP(*(.fini))
    *(.gcc_except_table)
  } >CODE

  . = ALIGN(4);

 

	/* section .ctors contains constructors */
	.ctors :
	{
		PROVIDE(__ctors_start__ = .);
		KEEP(*(SORT(.ctors.*)))
		KEEP(*(.ctors))
		PROVIDE(__ctors_end__ = .);
	} >CODE
	
	. = ALIGN(4);
	/* section .dtors contains destructors */
	.dtors :
	{
		PROVIDE(__dtors_start__ = .); 
		KEEP(*(SORT(.dtors.*)))
		KEEP(*(.dtors))
		PROVIDE(__dtors_end__ = .);
	} >CODE
  
    . = ALIGN(4);

  /* section .rodata  contains constants */
  .rodata :
  {
   *(.rodata) 
   *(.rodata.*)
   *(.gnu.linkonce.r.*)
  } >CODE
  
  . = ALIGN(4);
	
  
  _etext = . ;
  PROVIDE (etext = .);

  /* section .data  contains initialized data */

  .data : AT (_etext)
  {
    _data = . ;
    KEEP(*(.vectram))   /* added by mthomas */
    *(.data)
    *(.data.*)
    *(.gnu.linkonce.d.*)
    SORT(CONSTRUCTORS)
    . = ALIGN(4);
    *(.fastrun)
  } >DATA
  . = ALIGN(4);

  _edata = . ;
   PROVIDE (edata = .);

  /* section .bss contains uninitialized data */


  .bss :
  {
    __bss_start = . ;
    __bss_start__ = . ;
    *(.bss)
    *(.bss.*)
    *(.gnu.linkonce.b.*)
    *(COMMON)
  } >DATA
  . = ALIGN(4);
  __bss_end__ = . ;
  __bss_end__ = . ;

  _end = .;
  PROVIDE (end = .);

  /* Stabs contains debugger's sections  */
  .stab          0 : { *(.stab) }
  .stabstr       0 : { *(.stabstr) }
  .stab.excl     0 : { *(.stab.excl) }
  .stab.exclstr  0 : { *(.stab.exclstr) }
  .stab.index    0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  .comment       0 : { *(.comment) }

  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
}

So where is the problem? If you need any additional data, I will provide it.

The str9 requires the flash controller to be configured before any programming operation.

Are you using the default scripts and reset init?

Cheers

Spen

I use the default scripts from OpenOCD.

Script for STR:

# script for str9

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME str911
}

if { [info exists ENDIAN] } {
   set  _ENDIAN $ENDIAN
} else {
   set  _ENDIAN little
}

# jtag speed. We need to stick to 16kHz until we've finished reset.
jtag_rclk 10

jtag_nsrst_delay 100
jtag_ntrst_delay 100

#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst

if { [info exists FLASHTAPID ] } {
   set _FLASHTAPID $FLASHTAPID
} else {
   set _FLASHTAPID 0x04570041
}
jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x25966041
}
jtag newtap $_CHIPNAME cpu   -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID


if { [info exists BSTAPID ] } {
   set _BSTAPID $BSTAPID
} else {
   set _BSTAPID 0x2457f041
}
jtag newtap $_CHIPNAME bs    -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e

$_TARGETNAME configure -event reset-start { jtag_rclk 10 }

$_TARGETNAME configure -event reset-init {
	# We can increase speed now that we know the target is halted.
	jtag_rclk 1000

	# -- Enable 96K RAM
	# PFQBC enabled / DTCM & AHB wait-states disabled
	mww 0x5C002034 0x0191

	str9x flash_config 0 4 2 0 0x80000
	flash protect 0 0 7 off
}

$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0

#flash bank str9x <base> <size> 0 0 <target#> <variant>
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 $_TARGETNAME

# For more information about the configuration files, take a look at:
# openocd.texi

Is it correct ?

Script for interface is in different file.

ok, but you will still need to call reset init before programming.

This is so the reset script is called, this is used to configure the str9 flash controller before programming.

How are you invoking openocd/gdb ?

A typical script to connect gdb and program is :

target remote localhost:3333
reset init
load
thb main
c

Cheers

Spen

I’m using Eclipse plugin for GDB.

My startup code (in initialization commands box):

monitor reset init
load

ok, next enable debug log and post here

openocd -d 3 -l openocd.log

The data abort @ 0xe8a2b108 is a bit strange.

Spen