Hey all
How do you program the register “configuration bits” dell’STR912 with OpenOCD ?
There is a script (example) that performs this operation ?
Thanks again
You have to use the str9xpec flash driver - see http://openocd.sourceforge.net/doc/html … r9xpec-282
There are also numerous threads on this forum aswell
Cheers
Spen
Sorry, but people who have created the command “str9xpec” has not tried? Consequently, there is an example for its use?
Cheers
I ran the following command:
openocd-ftd2xx.exe -f jtagkey.cfg -f str912.cfg -f read_fuse.cfg
in read_fuse.cfg there is the following code:
init
Assert SRST, we do not want core running
While str9xpec supplied to access flash driver
jtag_reset 0 1
Turn off target polling
off in.
STR9 disable core
str9xpec enable_turbo 0
Read option bytes
str9xpec options_read 0
Re-enable core STR9
str9xpec disable_turbo 0
on in
reset halt
the error I have is the following:
Error: Trying to use configure scan chain anyway.
Suggestions ?
Thanks again
You may need to power cycle after enabling/disabling turbo mode as it changes the TAP setup.
So other than the error message (that i would expect) did the option bytes return info?
Spen
I do not know if I did well, but now I have made the following changes:
-
I renamed the original file in str912.cfg to str9xpec.cfg.
-
I changed all the commands str9x to str9xpec (into the file str9xpec.cfg).
-
I run the command "openocd-ftd2xx -f jtagkey.cfg -f str9xpec.cfg -f read_fuse.cfg
now I read along with many mistakes even the state of the configuration bits.
as you can see:
Info : only one transport option; autoselect ‘jtag’
RCLK - adaptive
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
Warn : str912.flash: nonstandard IR mask
Warn : str912.bs: nonstandard IR mask
Info : device: 4 “2232C”
Info : deviceID: 67358712
Info : SerialNumber: 32OQL4SUA
Info : Description: Amontec JTAGkey A
Info : RCLK (adaptive clock speed) not supported - fallback to 16 kHz
Info : JTAG tap: str912.flash tap/device found: 0x04570041 (mfg: 0x020, part: 0x4570, ver: 0x0)
Info : JTAG tap: str912.cpu tap/device found: 0x25966041 (mfg: 0x020, part: 0x5966, ver: 0x2)
Info : JTAG tap: str912.bs tap/device found: 0x2457f041 (mfg: 0x020, part: 0x457f, ver: 0x2)
Warn : JTAG tap: str912.bs UNEXPECTED: 0x2457f041 (mfg: 0x020, part: 0x457f, ver: 0x2)
Error: JTAG tap: str912.bs expected 1 of 1: 0x1457f041 (mfg: 0x020, part: 0x457f, ver: 0x1)
Error: Trying to use configured scan chain anyway…
Warn : Bypassing JTAG setup events due to errors
Info : Embedded ICE version 6
Info : str912.cpu: hardware has 2 breakpoint/watchpoint units
CS Map: bank0
OTP Lock: OTP Unlocked
LVD Threshold: 2.4v
LVD Reset Warning: VDD Input Only
LVD Reset Selection: VDD Input Only
RCLK not supported - fallback to 16 kHz
Info : JTAG tap: str912.flash tap/device found: 0x04570041 (mfg: 0x020, part: 0x4570, ver: 0x0)
Info : JTAG tap: str912.cpu tap/device found: 0x25966041 (mfg: 0x020, part: 0x5966, ver: 0x2)
Info : JTAG tap: str912.bs tap/device found: 0x2457f041 (mfg: 0x020, part: 0x457f, ver: 0x2)
Warn : JTAG tap: str912.bs UNEXPECTED: 0x2457f041 (mfg: 0x020, part: 0x457f, ver: 0x2)
Error: JTAG tap: str912.bs expected 1 of 1: 0x1457f041 (mfg: 0x020, part: 0x457f, ver: 0x1)
Error: Trying to use configured scan chain anyway…
Warn : Bypassing JTAG setup events due to errors
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
Warn : NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type ‘help dcc’.
Warn : NOTE! Severe performance degradation without fast memory access enabled. Type ‘help fast’.
shutdown command invoked.
This looks fine, just seems you have a newer boundary scan unit fitted on the chain.
It can be fixed by editing the target/str912.cfg
remember to use the str9xpec driver for writing the option bytes, use the normal flash driver for the flash - it is faster.
either of the following methods should stop the validation error.
# add ignore-version argument to tap declaration in target/str912.cfg
jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID -ignore-version
or
set _BSTAPID 0x1457f041
to
set _BSTAPID 0x2457f041
or set BSTAPID before calling target/str912.cfg
set BSTAPID 0x2457f041
source [find target/str912.cfg]
Cheers
Spen
Proven solution 1 and 2.
I seem to work correctly.
Attaching scripts used.
- openocd-ftd2xx.exe -f jtagkey.cfg -f str9xpec.cfg -f write_conf_bit.cfg
- write_conf_bit.cfg
init
assert srst, we do not want core running
while accessing str9xpec flash driver
jtag_reset 0 1
turn off target polling
poll off
disable str9 core
str9xpec enable_turbo 0
read option bytes
str9xpec options_read 0
#Prints the part identifier for bank num.
str9xpec part_id 0
#------------------------------
scommenta
#str9xpec options_cmap 0 bank0
str9xpec options_cmap 0 bank1
#str9xpec options_lvdsel 0 vdd
#str9xpec options_lvdsel 0 vdd_vddq
#str9xpec options_lvdthd 0 2.5v
str9xpec options_lvdthd 0 2.7v
#str9xpec options_lvdwarn 0 vdd
#str9xpec options_lvdwarn 0 vdd_vddq
#------------------------------
#Write str9 option bytes.
str9xpec options_write 0
read option bytes
str9xpec options_read 0
#Restore the str9 into JTAG chain.
str9xpec disable_turbo 0
poll on
reset halt
shutdown
- str9xpec.cfg
script for str9xpec
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME str912
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
jtag speed. We need to stick to 16kHz until we’ve finished reset.
jtag_rclk 16
adapter_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can’t set TRST/SRST separately
reset_config trst_and_srst
if { [info exists FLASHTAPID] } {
set _FLASHTAPID $FLASHTAPID
} else {
set _FLASHTAPID 0x04570041
}
jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x25966041
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID
} else {
set _BSTAPID 0x1457f041
}
#(2 version) delete the comment
set _BSTAPID 0x2457F041
(1 version) comments on the following line
jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
(1 version) delete the comment
#jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID -ignore-version
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
$_TARGETNAME configure -event reset-start { jtag_rclk 16 }
$_TARGETNAME configure -event reset-init {
We can increase speed now that we know the target is halted.
#jtag_rclk 3000
– Enable 96K RAM
PFQBC enabled / DTCM & AHB wait-states disabled
mww 0x5C002034 0x0191
str9xpec flash_config 0 4 2 0 0x80000
flash protect 0 0 7 off
}
$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
#flash bank str9xpec 0 0 <target#>
set _FLASHNAME $_CHIPNAME.flash0
flash bank $_FLASHNAME str9xpec 0x00000000 0x00080000 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash1
flash bank $_FLASHNAME str9xpec 0x00080000 0x00008000 0 0 $_TARGETNAME
waiting for script better…
thanks 1000