Reset problem with ST SpearNet

Development Boards MicroMod
1

Hi,

I’m using OpenOCD 1.27 with Amontec JTAGkey tiny and a STEVAL-SPEARNET board from ST Microelectronics with a Spear07NC03 (ARM7 TDMI core).

The onboard JTAG connector has TRST connected to the processor, SRST is not connected to anything.

The problem is that the core does not get resetted on startup of OpenOCD.

My configuration is as follows:

  • reset_config trst_only

    #target configuration

    daemon_startup reset

    target arm7tdmi little reset_halt 0 arm7tdmi-s_r4


    • The OpenOCD log:

  • ...

    Debug: jtag.c:1192 jtag_examine_chain(): JTAG device found: 0x0f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x0

    Debug: jtag.c:258 jtag_call_event_callbacks(): jtag event: 1

    Debug: jtag.c:1106 jtag_reset_callback():

    Debug: openocd.c:102 main(): jtag init complete

    Debug: jtag.c:258 jtag_call_event_callbacks(): jtag event: 3

    Debug: jtag.c:1106 jtag_reset_callback():

    Debug: arm7_9_common.c:660 arm7_9_assert_reset(): target->state: unknown

    Error: jtag.c:833 jtag_add_reset(): requested nSRST assertion, but the current configuration doesn’t support this

    Warning: arm7_9_common.c:675 arm7_9_assert_reset(): can’t assert srst

    Debug: arm7_9_common.c:728 arm7_9_deassert_reset(): target->state: unknown

    Debug: jtag.c:258 jtag_call_event_callbacks(): jtag event: 2

    Debug: jtag.c:1106 jtag_reset_callback():

    Debug: ft2232.c:940 jtagkey_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0x0f

    …


    • I do not understand the error message, of course the current configuration does not support SRST; how can I get core reset at all if only TRST is connected?

    Regards,

    Georg

    2

    Without nSRST there’s no way for the OpenOCD to reset the core. nTRST just resets the test logic (JTAG, EmbeddedICE), but leaves the core opreation unaffected.

    Some cores allow resets to be initiated by writing to a certain register, or by setting up a watchpoint and waiting for it to trigger. If your core supports this you could simply use OpenOCD’s mw[bhw] command to execute a reset.

    Regards,

    Dominic