SAM7S256 program only works with -fomit-frame-pointer

Development Boards MicroMod
1

Hi, I’ve got a broken program which is really frustrating. I don’t know if anyone here can help, it’s probably a long shot.

It’s a simple LED-flashing test program which I’ve adapted from a tutorial you can find [here. I’m using YAGARTO and OpenOCD.

The program is for a SAM7S256, and the actual LED flashing code I’ve written seems fine in its entirety. The cause of the problem seems to lie in the initialisation C code, or it may be the fault of something in the startup assembly code (I’ve included the contents of these two files at the bottom of this post).

Here is where it gets really screwy. The code actually runs fine - as long as there’s optimisation specified when compiling. I’ve narrowed it down, and the single optimisation setting which (when enabled) lets the program work is “-fomit-frame-pointer”.

Without this setting, an abort exception occurs when running the program on the MCU. The exception occurs just before the end of the initialisation function.

What’s more, this only happens if I don’t have the memory remapped:

So if I power up the microcontroller, so that flash is mapped to address 0x0, the program aborts after attempting to execute the instruction at 0x340. This is just a few instructions before the point where the initialisation function is supposed to return to the startup assembly code.

If I then use OpenOCD’s “soft_reset_halt” command to get back to address 0x0, then use the “mww” command to write a register and ensure that RAM is remapped to 0x0 instead of flash, the program works and the LED flashing loop is reached.

When the program starts from RAM, it jumps to the reset code in flash all the same, but the code in flash is run from its actual addresses in this case (starting at 0x00100000). So when it reaches 0x00100340, the same place where it aborted when running from the remap region, the program continues without a problem and returns to the startup code after 0x00100348. From there the startup code finishes, the main function is branched to, and the LEDs start flashing.

So I have no idea how the little bit of extra code to do with frame pointers is breaking the program in these circumstances. It’s obviously got something to do with the address differences between remapping to ROM/RAM, but I just don’t understand how.

I’m thinking that maybe the code (which is optimised out when I use the “-fomit-frame-pointer” option) is doing some relative addressing stuff at the end of the sam7s256_init function. The compiler must be putting something in after the function body. But because the memory remap occurs at the end of the function, any relative addressing stuff appended after that would all of a sudden be pointing to RAM instead of flash. This is the only explanation I can think of, but I have no idea if it’s right, and how would I fix it? Is the best solution just to ensure I use “-fomit-frame-pointer” when compiling the initialisation code?

One more thing, I’m compiling with these options:

arm-none-eabi-gcc -marm -g -c -mcpu=arm7tdmi -mthumb-interwork -ffunction-sections -Wall -I . -o sam7s256_init.o sam7s256_init.c

I’m hoping someone more experienced will just see the problem in my code straight away. Thanks for reading.

/* File: sam7s_startup.s
 */

/* Program Status Register bit definitions: */
.equ I_BIT, 0x80
.equ F_BIT, 0x40

.equ USR_MODE, 0x10
.equ FIQ_MODE, 0x11
.equ IRQ_MODE, 0x12
.equ SVC_MODE, 0x13
.equ ABT_MODE, 0x17
.equ UND_MODE, 0x1B
.equ SYS_MODE, 0x1F

.equ STACK_FILL, 0xAAAAAAAA

    .text
    .arm


/* The following code, being the exception vectors, needs to be linked at the
 * start of ROM.
 */
    .global _vectors
    .func   _vectors

_vectors:
    /* Vector table
     * This is used only until RAM is remapped to address zero instead of flash.
     */

    B       _reset      /* Reset (Remapped or not, this branches correctly.) */
    B       .           /* Undefined Instruction */
    B       .           /* Software Interrupt */
    B       .           /* Prefetch Abort */
    B       .           /* Data Abort */
    B       .           /* Reserved */
    B       .           /* IRQ */
    B       .           /* FIQ */

    .size _vectors, . - _vectors
    .endfunc

    .string "Test LED Flashing Program"

    .align 2


    .func   _reset

_reset:
    /* NOTE: This startup file is suitable for any SAM7S chip, as long as the
     * following branch instruction calls an initialisation function appropriate
     * for the chip being used, in this case the SAM7S256.
     */

    LDR     r0, =_reset         /* Pass the reset address as the 1st arg */
    LDR     r1, =_cstartup      /* Pass the return address as the 2nd arg */
    MOV     lr, r1              /* Store return address in the link register */
    LDR     sp, =__stack_end__  /* Set the temporary stack pointer */
    B       sam7s256_init       /* Branch to the initialisation function */

_cstartup:
    /* NOTE: The following executes upon return from the chip-specific
     * initialisation code. At this time, the memory remap will have occurred,
     * and so from this point on the code will execute at its linked address
     * (i.e. from 0x00100000 onwards).
     */

    /* Copy the .fastcode section from ROM to RAM. */
    LDR     r0, =__fastcode_load
    LDR     r1, =__fastcode_start
    LDR     r2, =__fastcode_end
1:
    CMP     r1, r2
    LDMLTIA r0!, {r3}
    STMLTIA r1!, {r3}
    BLT     1b

    /* Copy the .data section from ROM to RAM. (Initialised variables) */
    LDR     r0, =__data_load
    LDR     r1, =__data_start
    LDR     r2, =_edata
1:
    CMP     r1, r2
    LDMLTIA r0!, {r3}
    STMLTIA r1!, {r3}
    BLT     1b

    /* Clear the .bss section to zero. (Clearing uninitialised variables.) */
    LDR     r1, =__bss_start__
    LDR     r2, =__bss_end__
    MOV     r3, #0
1:
    CMP     r1, r2
    STMLTIA r1!, {r3}
    BLT     1b

    /* Fill in the .stack section. */
    LDR     r1, =__stack_start__
    LDR     r2, =__stack_end__
    LDR     r3, =STACK_FILL
1:
    CMP r1, r2
    STMLTIA r1!, {r3}
    BLT     1b

    /* Initialise the stack pointers for each of the exception modes.  */

    MSR     CPSR_c, #(IRQ_MODE | I_BIT | F_BIT) /* Switch to IRQ mode */
    LDR     sp, =__irq_stack_top__              /* Set the IRQ stack pointer */

    MSR     CPSR_c, #(FIQ_MODE | I_BIT | F_BIT) /* Switch to FIQ mode */
    LDR     sp, =__fiq_stack_top__              /* Set the FIQ stack pointer */

    MSR     CPSR_c, #(SVC_MODE | I_BIT | F_BIT) /* Switch to SVC mode */
    LDR     sp, =__svc_stack_top__              /* Set the SVC stack pointer */

    MSR     CPSR_c, #(ABT_MODE | I_BIT | F_BIT) /* Switch to ABT mode */
    LDR     sp, =__abt_stack_top__              /* Set the ABT stack pointer */

    MSR     CPSR_c, #(UND_MODE | I_BIT | F_BIT) /* Switch to UND mode */
    LDR     sp, =__und_stack_top__              /* Set the UND stack pointer */

    /* This is for setting the system and user mode stack pointer. This is the
     * normal mode of operation.
     */
    MSR     CPSR_c, #(SYS_MODE | I_BIT | F_BIT) /* Switch to SYS mode */
    LDR     sp, =__c_stack_top__                /* Set the C stack pointer */

    /* Enter the C code. */
    LDR     r12, =main
    MOV     lr, pc          /* Set the return address */
    BX      r12             /* The target code can be ARM or THUMB */

    /* Cause an exception if main() ever returns. */
    SWI     0xFFFFFF

    .size   _reset, . - _reset
    .endfunc

    .end

// File: sam7s256_init.c

#include <stdint.h>
#include "AT91SAM7S256.h"
#include "dev_board.h"

void sam7s256_init(void (*reset_addr)(), void (*return_addr)())
{
	// This is the address where RAM starts, as defined by the linker script,
	// i.e. 0x00200000.
	extern uint8_t __ram_start;
	// LDR instruction for setting PC to PC + 0x18.
	static uint32_t const LDR_PC_PC_0x18 = 0xE59FF000U | 0x18;
	static uint32_t const MAGIC = 0xDEADBEEFU;

	// Enable the User Reset.
	AT91C_BASE_RSTC->RSTC_RMR |= AT91C_RSTC_URSTEN | (0xA5 << 24);

	// Set up the Embedded Flash Controller.
	AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN) & ((MCK + 500000)/1000000 << 16))
							| AT91C_MC_FWS_1FWS;

	// Disable the Watchdog Timer.
	AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;

	// Enable the Main Oscillator.
	AT91C_BASE_PMC->PMC_MOR = ((6 << 8) & AT91C_CKGR_OSCOUNT) |
							  AT91C_CKGR_MOSCEN;
	// Wait for the startup time to elapse and the Main Oscillator to stabilise.
	while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));

	// Configure the PLL.
	AT91C_BASE_PMC->PMC_PLLR = (AT91C_CKGR_DIV & 0x05) |
							   (AT91C_CKGR_PLLCOUNT & (29 << 8)) |
							   (AT91C_CKGR_MUL & (25 << 16));
	// Wait for the startup time to elapse.
	while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK));
	// Wait for the Master Clock to become ready.
	while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));

	// Configure the Master Clock and CPU clock.
	AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
	// Wait for the Master Clock to become ready.
	while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
	// Set the Master Clock to the PLL Clock now that the prescaler has been set
	// to 2, meaning that the clock speed won't go over the 55MHz limit.
	AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
	// Wait for the Master Clock to become ready.
	while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));

	// Setup the exception vectors in RAM.
	*(uint32_t volatile *)(&__ram_start + 0x00) = LDR_PC_PC_0x18;
	*(uint32_t volatile *)(&__ram_start + 0x04) = LDR_PC_PC_0x18;
	*(uint32_t volatile *)(&__ram_start + 0x08) = LDR_PC_PC_0x18;
	*(uint32_t volatile *)(&__ram_start + 0x0C) = LDR_PC_PC_0x18;
	*(uint32_t volatile *)(&__ram_start + 0x10) = LDR_PC_PC_0x18;
	*(uint32_t volatile *)(&__ram_start + 0x14) = MAGIC;
	*(uint32_t volatile *)(&__ram_start + 0x18) = LDR_PC_PC_0x18;
	*(uint32_t volatile *)(&__ram_start + 0x1C) = LDR_PC_PC_0x18;

	// Secondary vector table.
	*(uint32_t volatile *)(&__ram_start + 0x20) = (uint32_t)reset_addr;
	*(uint32_t volatile *)(&__ram_start + 0x24) = 0x04U;
	*(uint32_t volatile *)(&__ram_start + 0x28) = 0x08U;
	*(uint32_t volatile *)(&__ram_start + 0x2C) = 0x0CU;
	*(uint32_t volatile *)(&__ram_start + 0x30) = 0x10U;
	*(uint32_t volatile *)(&__ram_start + 0x34) = 0x14U;
	*(uint32_t volatile *)(&__ram_start + 0x38) = 0x18U;
	*(uint32_t volatile *)(&__ram_start + 0x3C) = 0x1CU;

	// Remap the memory.
	if (MAGIC != (*(uint32_t volatile *)0x14))
	{
		AT91C_BASE_MC->MC_RCR = 1;
	}
}

](http://www.state-machine.com/arm/Building_bare-metal_ARM_with_GNU.pdf)

2

I came up with a fix while my topic was being approved. I changed the first line of assembly code from “B _reset” to “LDR pc, =_reset” in order to branch absolutely to the RAM addresses (0x0010 0000 onwards) as soon as the program starts up, rather than letting it run the startup code from the remap region addresses.

So this is a fix that works without actually knowing if I’m right about what the problem was. If anyone can add to my understanding that would be appreciated.

I also compiled the initalisation C code with the same options as mentioned in the original post (no optimisation enabled) and output an assembly file. Here is part of that file:

	str	r2, [r3, #0]	@ tmp212, D.4676_58->MC_RCR
.L1:
	.loc 1 197 0
	add	sp, fp, #0	@,,
	ldmfd	sp!, {fp}
	bx	lr
.L9:
	.align	2
.L8:
	.word	-768
	.word	3145984
	.word	-704
	.word	-1024

The return to the startup code, which occurs at 0x00100348, must be the line “bx lr”. Therefore, the piece of code causing the data abort at 0x340 (when running with flash in the remap region) must be the line “add sp, fp, #0 @,”.

I don’t know much about assembly code, so I don’t know what the at sign and commas do. I also don’t understand how that line could be causing a data abort, which it does when running from the remap region. Can anyone explain this to me?

Here is the full assembly output if it helps:

	.cpu arm7tdmi
	.fpu softvfp
	.eabi_attribute 20, 1	@ Tag_ABI_FP_denormal
	.eabi_attribute 21, 1	@ Tag_ABI_FP_exceptions
	.eabi_attribute 23, 3	@ Tag_ABI_FP_number_model
	.eabi_attribute 24, 1	@ Tag_ABI_align8_needed
	.eabi_attribute 25, 1	@ Tag_ABI_align8_preserved
	.eabi_attribute 26, 1	@ Tag_ABI_enum_size
	.eabi_attribute 30, 6	@ Tag_ABI_optimization_goals
	.eabi_attribute 34, 0	@ Tag_CPU_unaligned_access
	.eabi_attribute 18, 4	@ Tag_ABI_PCS_wchar_t
	.file	"sam7s256_init.c"
@ GNU C (GCC) version 4.7.2 (arm-none-eabi)
@	compiled by GNU C version 3.4.5 (mingw-vista special r3), GMP version 5.0.4, MPFR version 2.4.2, MPC version 0.8.1
@ GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
@ options passed:  -I .
@ -iprefix c:\yagarto-20121222\bin\../lib/gcc/arm-none-eabi/4.7.2/
@ -D__USES_INITFINI__ sam7s256_init.c -marm -mcpu=arm7tdmi
@ -mthumb-interwork -auxbase-strip sam7s256_init_O0.s -g -Wall
@ -ffunction-sections -fverbose-asm
@ options enabled:  -fauto-inc-dec -fbranch-count-reg -fcommon
@ -fdebug-types-section -fdelete-null-pointer-checks -fdwarf2-cfi-asm
@ -fearly-inlining -feliminate-unused-debug-types -ffunction-cse
@ -ffunction-sections -fgcse-lm -fgnu-runtime -fident -finline-atomics
@ -fira-share-save-slots -fira-share-spill-slots -fivopts
@ -fkeep-static-consts -fleading-underscore -fmath-errno
@ -fmerge-debug-strings -fmove-loop-invariants -fpeephole
@ -fprefetch-loop-arrays -freg-struct-return
@ -fsched-critical-path-heuristic -fsched-dep-count-heuristic
@ -fsched-group-heuristic -fsched-interblock -fsched-last-insn-heuristic
@ -fsched-rank-heuristic -fsched-spec -fsched-spec-insn-heuristic
@ -fsched-stalled-insns-dep -fshow-column -fsigned-zeros
@ -fsplit-ivs-in-unroller -fstrict-volatile-bitfields -ftrapping-math
@ -ftree-cselim -ftree-forwprop -ftree-loop-if-convert -ftree-loop-im
@ -ftree-loop-ivcanon -ftree-loop-optimize -ftree-parallelize-loops=
@ -ftree-phiprop -ftree-pta -ftree-reassoc -ftree-scev-cprop
@ -ftree-slp-vectorize -ftree-vect-loop-version -funit-at-a-time
@ -fverbose-asm -fzero-initialized-in-bss -marm -mlittle-endian
@ -msched-prolog -mthumb-interwork -mvectorize-with-neon-quad

	.text
.Ltext0:
	.cfi_sections	.debug_frame
	.section	.text.sam7s256_init,"ax",%progbits
	.align	2
	.global	sam7s256_init
	.type	sam7s256_init, %function
sam7s256_init:
.LFB0:
	.file 1 "sam7s256_init.c"
	.loc 1 42 0
	.cfi_startproc
	@ Function supports interworking.
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!	@,
.LCFI0:
	.cfi_def_cfa_offset 4
	.cfi_offset 11, -4
	add	fp, sp, #0	@,,
.LCFI1:
	.cfi_def_cfa_register 11
	sub	sp, sp, #12	@,,
	str	r0, [fp, #-8]	@ reset_addr, reset_addr
	str	r1, [fp, #-12]	@ return_addr, return_addr
	.loc 1 63 0
	ldr	r2, .L8	@ D.4618,
	ldr	r3, .L8	@ D.4619,
	ldr	r3, [r3, #8]	@ D.4620, D.4619_2->RSTC_RMR
	orr	r3, r3, #-1526726656	@ D.4621, D.4620,
	orr	r3, r3, #1	@ D.4621, D.4621,
	str	r3, [r2, #8]	@ D.4621, D.4618_1->RSTC_RMR
	.loc 1 72 0
	mvn	r3, #255	@ D.4622,
	ldr	r2, .L8+4	@ tmp191,
	str	r2, [r3, #96]	@ tmp191, D.4622_5->MC_FMR
	.loc 1 82 0
	ldr	r3, .L8+8	@ D.4623,
	mov	r2, #32768	@ tmp192,
	str	r2, [r3, #4]	@ tmp192, D.4623_6->WDTC_WDMR
	.loc 1 98 0
	ldr	r3, .L8+12	@ D.4624,
	ldr	r2, .L8+16	@ tmp193,
	str	r2, [r3, #32]	@ tmp193, D.4624_7->PMC_MOR
	.loc 1 101 0
	mov	r0, r0	@ nop
.L2:
	.loc 1 101 0 is_stmt 0 discriminator 1
	ldr	r3, .L8+12	@ D.4625,
	ldr	r3, [r3, #104]	@ D.4626, D.4625_8->PMC_SR
	and	r3, r3, #1	@ D.4627, D.4626,
	cmp	r3, #0	@ D.4627,
	beq	.L2	@,
	.loc 1 115 0 is_stmt 1
	ldr	r3, .L8+12	@ D.4628,
	ldr	r2, .L8+20	@ tmp194,
	str	r2, [r3, #44]	@ tmp194, D.4628_11->PMC_PLLR
	.loc 1 119 0
	mov	r0, r0	@ nop
.L3:
	.loc 1 119 0 is_stmt 0 discriminator 1
	ldr	r3, .L8+12	@ D.4629,
	ldr	r3, [r3, #104]	@ D.4630, D.4629_12->PMC_SR
	and	r3, r3, #4	@ D.4631, D.4630,
	cmp	r3, #0	@ D.4631,
	beq	.L3	@,
	.loc 1 121 0 is_stmt 1
	mov	r0, r0	@ nop
.L4:
	.loc 1 121 0 is_stmt 0 discriminator 1
	ldr	r3, .L8+12	@ D.4632,
	ldr	r3, [r3, #104]	@ D.4633, D.4632_15->PMC_SR
	and	r3, r3, #8	@ D.4634, D.4633,
	cmp	r3, #0	@ D.4634,
	beq	.L4	@,
	.loc 1 129 0 is_stmt 1
	ldr	r3, .L8+12	@ D.4635,
	mov	r2, #4	@ tmp195,
	str	r2, [r3, #48]	@ tmp195, D.4635_18->PMC_MCKR
	.loc 1 131 0
	mov	r0, r0	@ nop
.L5:
	.loc 1 131 0 is_stmt 0 discriminator 1
	ldr	r3, .L8+12	@ D.4636,
	ldr	r3, [r3, #104]	@ D.4637, D.4636_19->PMC_SR
	and	r3, r3, #8	@ D.4638, D.4637,
	cmp	r3, #0	@ D.4638,
	beq	.L5	@,
	.loc 1 134 0 is_stmt 1
	ldr	r3, .L8+12	@ D.4639,
	ldr	r2, .L8+12	@ D.4640,
	ldr	r2, [r2, #48]	@ D.4641, D.4640_23->PMC_MCKR
	orr	r2, r2, #3	@ D.4642, D.4641,
	str	r2, [r3, #48]	@ D.4642, D.4639_22->PMC_MCKR
	.loc 1 136 0
	mov	r0, r0	@ nop
.L6:
	.loc 1 136 0 is_stmt 0 discriminator 1
	ldr	r3, .L8+12	@ D.4643,
	ldr	r3, [r3, #104]	@ D.4644, D.4643_26->PMC_SR
	and	r3, r3, #8	@ D.4645, D.4644,
	cmp	r3, #0	@ D.4645,
	beq	.L6	@,
	.loc 1 162 0 is_stmt 1
	ldr	r3, .L8+24	@ __ram_start.0,
	ldr	r2, .L8+28	@ tmp196,
	ldr	r2, [r2, #0]	@ LDR_PC_PC_0x18.1, LDR_PC_PC_0x18
	str	r2, [r3, #0]	@ LDR_PC_PC_0x18.1, MEM[(volatile uint32_t *)__ram_start.0_29]
	.loc 1 163 0
	ldr	r3, .L8+32	@ D.4648,
	ldr	r2, .L8+28	@ tmp197,
	ldr	r2, [r2, #0]	@ LDR_PC_PC_0x18.2, LDR_PC_PC_0x18
	str	r2, [r3, #0]	@ LDR_PC_PC_0x18.2, *D.4648_31
	.loc 1 164 0
	ldr	r3, .L8+36	@ D.4650,
	ldr	r2, .L8+28	@ tmp198,
	ldr	r2, [r2, #0]	@ LDR_PC_PC_0x18.3, LDR_PC_PC_0x18
	str	r2, [r3, #0]	@ LDR_PC_PC_0x18.3, *D.4650_33
	.loc 1 165 0
	ldr	r3, .L8+40	@ D.4652,
	ldr	r2, .L8+28	@ tmp199,
	ldr	r2, [r2, #0]	@ LDR_PC_PC_0x18.4, LDR_PC_PC_0x18
	str	r2, [r3, #0]	@ LDR_PC_PC_0x18.4, *D.4652_35
	.loc 1 166 0
	ldr	r3, .L8+44	@ D.4654,
	ldr	r2, .L8+28	@ tmp200,
	ldr	r2, [r2, #0]	@ LDR_PC_PC_0x18.5, LDR_PC_PC_0x18
	str	r2, [r3, #0]	@ LDR_PC_PC_0x18.5, *D.4654_37
	.loc 1 167 0
	ldr	r3, .L8+48	@ D.4656,
	ldr	r2, .L8+52	@ tmp201,
	ldr	r2, [r2, #0]	@ MAGIC.6, MAGIC
	str	r2, [r3, #0]	@ MAGIC.6, *D.4656_39
	.loc 1 168 0
	ldr	r3, .L8+56	@ D.4658,
	ldr	r2, .L8+28	@ tmp202,
	ldr	r2, [r2, #0]	@ LDR_PC_PC_0x18.7, LDR_PC_PC_0x18
	str	r2, [r3, #0]	@ LDR_PC_PC_0x18.7, *D.4658_41
	.loc 1 169 0
	ldr	r3, .L8+60	@ D.4660,
	ldr	r2, .L8+28	@ tmp203,
	ldr	r2, [r2, #0]	@ LDR_PC_PC_0x18.8, LDR_PC_PC_0x18
	str	r2, [r3, #0]	@ LDR_PC_PC_0x18.8, *D.4660_43
	.loc 1 172 0
	ldr	r3, .L8+64	@ D.4662,
	ldr	r2, [fp, #-8]	@ reset_addr.9, reset_addr
	str	r2, [r3, #0]	@ reset_addr.9, *D.4662_45
	.loc 1 173 0
	ldr	r3, .L8+68	@ D.4664,
	mov	r2, #4	@ tmp204,
	str	r2, [r3, #0]	@ tmp204, *D.4664_48
	.loc 1 174 0
	ldr	r3, .L8+72	@ D.4665,
	mov	r2, #8	@ tmp205,
	str	r2, [r3, #0]	@ tmp205, *D.4665_49
	.loc 1 175 0
	ldr	r3, .L8+76	@ D.4666,
	mov	r2, #12	@ tmp206,
	str	r2, [r3, #0]	@ tmp206, *D.4666_50
	.loc 1 176 0
	ldr	r3, .L8+80	@ D.4667,
	mov	r2, #16	@ tmp207,
	str	r2, [r3, #0]	@ tmp207, *D.4667_51
	.loc 1 177 0
	ldr	r3, .L8+84	@ D.4668,
	mov	r2, #20	@ tmp208,
	str	r2, [r3, #0]	@ tmp208, *D.4668_52
	.loc 1 178 0
	ldr	r3, .L8+88	@ D.4669,
	mov	r2, #24	@ tmp209,
	str	r2, [r3, #0]	@ tmp209, *D.4669_53
	.loc 1 179 0
	ldr	r3, .L8+92	@ D.4670,
	mov	r2, #28	@ tmp210,
	str	r2, [r3, #0]	@ tmp210, *D.4670_54
	.loc 1 193 0
	mov	r3, #20	@ D.4671,
	ldr	r2, [r3, #0]	@ D.4672, *D.4671_55
	ldr	r3, .L8+52	@ tmp211,
	ldr	r3, [r3, #0]	@ MAGIC.10, MAGIC
	cmp	r2, r3	@ D.4672, MAGIC.10
	beq	.L1	@,
	.loc 1 195 0
	mvn	r3, #255	@ D.4676,
	mov	r2, #1	@ tmp212,
	str	r2, [r3, #0]	@ tmp212, D.4676_58->MC_RCR
.L1:
	.loc 1 197 0
	add	sp, fp, #0	@,,
	ldmfd	sp!, {fp}
	bx	lr
.L9:
	.align	2
.L8:
	.word	-768
	.word	3145984
	.word	-704
	.word	-1024
	.word	1537
	.word	1645829
	.word	__ram_start
	.word	LDR_PC_PC_0x18.4597
	.word	__ram_start+4
	.word	__ram_start+8
	.word	__ram_start+12
	.word	__ram_start+16
	.word	__ram_start+20
	.word	MAGIC.4598
	.word	__ram_start+24
	.word	__ram_start+28
	.word	__ram_start+32
	.word	__ram_start+36
	.word	__ram_start+40
	.word	__ram_start+44
	.word	__ram_start+48
	.word	__ram_start+52
	.word	__ram_start+56
	.word	__ram_start+60
	.cfi_endproc
.LFE0:
	.size	sam7s256_init, .-sam7s256_init
	.section	.rodata
	.align	2
	.type	LDR_PC_PC_0x18.4597, %object
	.size	LDR_PC_PC_0x18.4597, 4
LDR_PC_PC_0x18.4597:
	.word	-442503144
	.align	2
	.type	MAGIC.4598, %object
	.size	MAGIC.4598, 4
MAGIC.4598:
	.word	-559038737
	.text
.Letext0:
	.file 2 "c:/yagarto-20121222/lib/gcc/../../arm-none-eabi/sys-include/stdint.h"
	.file 3 "AT91SAM7S256.h"
	.section	.debug_info,"",%progbits
.Ldebug_info0:
	.4byte	0x3f0
	.2byte	0x2
	.4byte	.Ldebug_abbrev0
	.byte	0x4
	.uleb128 0x1
	.4byte	.LASF58
	.byte	0x1
	.4byte	.LASF59
	.4byte	.LASF60
	.4byte	.Ldebug_ranges0+0
	.4byte	0
	.4byte	0
	.4byte	.Ldebug_line0
	.uleb128 0x2
	.byte	0x1
	.byte	0x6
	.4byte	.LASF0
	.uleb128 0x3
	.4byte	.LASF5
	.byte	0x2
	.byte	0x2a
	.4byte	0x3b
	.uleb128 0x2
	.byte	0x1
	.byte	0x8
	.4byte	.LASF1
	.uleb128 0x2
	.byte	0x2
	.byte	0x5
	.4byte	.LASF2
	.uleb128 0x2
	.byte	0x2
	.byte	0x7
	.4byte	.LASF3
	.uleb128 0x2
	.byte	0x4
	.byte	0x5
	.4byte	.LASF4
	.uleb128 0x3
	.4byte	.LASF6
	.byte	0x2
	.byte	0x50
	.4byte	0x62
	.uleb128 0x2
	.byte	0x4
	.byte	0x7
	.4byte	.LASF7
	.uleb128 0x2
	.byte	0x8
	.byte	0x5
	.4byte	.LASF8
	.uleb128 0x2
	.byte	0x8
	.byte	0x7
	.4byte	.LASF9
	.uleb128 0x4
	.byte	0x4
	.byte	0x5
	.ascii	"int\000"
	.uleb128 0x2
	.byte	0x4
	.byte	0x7
	.4byte	.LASF10
	.uleb128 0x3
	.4byte	.LASF11
	.byte	0x3
	.byte	0x3b
	.4byte	0x90
	.uleb128 0x5
	.4byte	0x7e
	.uleb128 0x2
	.byte	0x4
	.byte	0x7
	.4byte	.LASF12
	.uleb128 0x6
	.4byte	0x85
	.4byte	0xac
	.uleb128 0x7
	.4byte	0x95
	.byte	0
	.byte	0
	.uleb128 0x6
	.4byte	0x85
	.4byte	0xbc
	.uleb128 0x7
	.4byte	0x95
	.byte	0x2
	.byte	0
	.uleb128 0x6
	.4byte	0x85
	.4byte	0xcc
	.uleb128 0x7
	.4byte	0x95
	.byte	0x4
	.byte	0
	.uleb128 0x8
	.4byte	.LASF34
	.byte	0x70
	.byte	0x3
	.2byte	0x1f2
	.4byte	0x206
	.uleb128 0x9
	.4byte	.LASF13
	.byte	0x3
	.2byte	0x1f3
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0
	.uleb128 0x9
	.4byte	.LASF14
	.byte	0x3
	.2byte	0x1f4
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x4
	.uleb128 0x9
	.4byte	.LASF15
	.byte	0x3
	.2byte	0x1f5
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x8
	.uleb128 0x9
	.4byte	.LASF16
	.byte	0x3
	.2byte	0x1f6
	.4byte	0x206
	.byte	0x2
	.byte	0x23
	.uleb128 0xc
	.uleb128 0x9
	.4byte	.LASF17
	.byte	0x3
	.2byte	0x1f7
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x10
	.uleb128 0x9
	.4byte	.LASF18
	.byte	0x3
	.2byte	0x1f8
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x14
	.uleb128 0x9
	.4byte	.LASF19
	.byte	0x3
	.2byte	0x1f9
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x18
	.uleb128 0x9
	.4byte	.LASF20
	.byte	0x3
	.2byte	0x1fa
	.4byte	0x20b
	.byte	0x2
	.byte	0x23
	.uleb128 0x1c
	.uleb128 0x9
	.4byte	.LASF21
	.byte	0x3
	.2byte	0x1fb
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x20
	.uleb128 0x9
	.4byte	.LASF22
	.byte	0x3
	.2byte	0x1fc
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x24
	.uleb128 0x9
	.4byte	.LASF23
	.byte	0x3
	.2byte	0x1fd
	.4byte	0x210
	.byte	0x2
	.byte	0x23
	.uleb128 0x28
	.uleb128 0x9
	.4byte	.LASF24
	.byte	0x3
	.2byte	0x1fe
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x2c
	.uleb128 0x9
	.4byte	.LASF25
	.byte	0x3
	.2byte	0x1ff
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x30
	.uleb128 0x9
	.4byte	.LASF26
	.byte	0x3
	.2byte	0x200
	.4byte	0x215
	.byte	0x2
	.byte	0x23
	.uleb128 0x34
	.uleb128 0x9
	.4byte	.LASF27
	.byte	0x3
	.2byte	0x201
	.4byte	0x21a
	.byte	0x2
	.byte	0x23
	.uleb128 0x40
	.uleb128 0x9
	.4byte	.LASF28
	.byte	0x3
	.2byte	0x202
	.4byte	0x21f
	.byte	0x2
	.byte	0x23
	.uleb128 0x4c
	.uleb128 0x9
	.4byte	.LASF29
	.byte	0x3
	.2byte	0x203
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x60
	.uleb128 0x9
	.4byte	.LASF30
	.byte	0x3
	.2byte	0x204
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x64
	.uleb128 0x9
	.4byte	.LASF31
	.byte	0x3
	.2byte	0x205
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x68
	.uleb128 0x9
	.4byte	.LASF32
	.byte	0x3
	.2byte	0x206
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x6c
	.byte	0
	.uleb128 0x5
	.4byte	0x9c
	.uleb128 0x5
	.4byte	0x9c
	.uleb128 0x5
	.4byte	0x9c
	.uleb128 0x5
	.4byte	0xac
	.uleb128 0x5
	.4byte	0xac
	.uleb128 0x5
	.4byte	0xbc
	.uleb128 0xa
	.4byte	.LASF33
	.byte	0x3
	.2byte	0x207
	.4byte	0x230
	.uleb128 0xb
	.byte	0x4
	.4byte	0xcc
	.uleb128 0x8
	.4byte	.LASF35
	.byte	0xc
	.byte	0x3
	.2byte	0x23f
	.4byte	0x271
	.uleb128 0x9
	.4byte	.LASF36
	.byte	0x3
	.2byte	0x240
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0
	.uleb128 0x9
	.4byte	.LASF37
	.byte	0x3
	.2byte	0x241
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x4
	.uleb128 0x9
	.4byte	.LASF38
	.byte	0x3
	.2byte	0x242
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x8
	.byte	0
	.uleb128 0xa
	.4byte	.LASF39
	.byte	0x3
	.2byte	0x243
	.4byte	0x27d
	.uleb128 0xb
	.byte	0x4
	.4byte	0x236
	.uleb128 0x8
	.4byte	.LASF40
	.byte	0xc
	.byte	0x3
	.2byte	0x29f
	.4byte	0x2be
	.uleb128 0x9
	.4byte	.LASF41
	.byte	0x3
	.2byte	0x2a0
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0
	.uleb128 0x9
	.4byte	.LASF42
	.byte	0x3
	.2byte	0x2a1
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x4
	.uleb128 0x9
	.4byte	.LASF43
	.byte	0x3
	.2byte	0x2a2
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x8
	.byte	0
	.uleb128 0xa
	.4byte	.LASF44
	.byte	0x3
	.2byte	0x2a3
	.4byte	0x2ca
	.uleb128 0xb
	.byte	0x4
	.4byte	0x283
	.uleb128 0x8
	.4byte	.LASF45
	.byte	0x6c
	.byte	0x3
	.2byte	0x2cc
	.4byte	0x347
	.uleb128 0x9
	.4byte	.LASF46
	.byte	0x3
	.2byte	0x2cd
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0
	.uleb128 0x9
	.4byte	.LASF47
	.byte	0x3
	.2byte	0x2ce
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x4
	.uleb128 0x9
	.4byte	.LASF48
	.byte	0x3
	.2byte	0x2cf
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x8
	.uleb128 0x9
	.4byte	.LASF16
	.byte	0x3
	.2byte	0x2d0
	.4byte	0x357
	.byte	0x2
	.byte	0x23
	.uleb128 0xc
	.uleb128 0x9
	.4byte	.LASF49
	.byte	0x3
	.2byte	0x2d1
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x60
	.uleb128 0x9
	.4byte	.LASF50
	.byte	0x3
	.2byte	0x2d2
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x64
	.uleb128 0x9
	.4byte	.LASF51
	.byte	0x3
	.2byte	0x2d3
	.4byte	0x85
	.byte	0x2
	.byte	0x23
	.uleb128 0x68
	.byte	0
	.uleb128 0x6
	.4byte	0x85
	.4byte	0x357
	.uleb128 0x7
	.4byte	0x95
	.byte	0x14
	.byte	0
	.uleb128 0x5
	.4byte	0x347
	.uleb128 0xa
	.4byte	.LASF52
	.byte	0x3
	.2byte	0x2d4
	.4byte	0x368
	.uleb128 0xb
	.byte	0x4
	.4byte	0x2d0
	.uleb128 0xc
	.byte	0x1
	.4byte	.LASF61
	.byte	0x1
	.byte	0x29
	.byte	0x1
	.4byte	.LFB0
	.4byte	.LFE0
	.4byte	.LLST0
	.byte	0x1
	.4byte	0x3d4
	.uleb128 0xd
	.4byte	.LASF53
	.byte	0x1
	.byte	0x29
	.4byte	0x3db
	.byte	0x2
	.byte	0x91
	.sleb128 -12
	.uleb128 0xd
	.4byte	.LASF54
	.byte	0x1
	.byte	0x29
	.4byte	0x3db
	.byte	0x2
	.byte	0x91
	.sleb128 -16
	.uleb128 0xe
	.4byte	.LASF57
	.byte	0x1
	.byte	0x2d
	.4byte	0x30
	.byte	0x1
	.byte	0x1
	.uleb128 0xf
	.4byte	.LASF55
	.byte	0x1
	.byte	0x35
	.4byte	0x3e1
	.byte	0x5
	.byte	0x3
	.4byte	LDR_PC_PC_0x18.4597
	.uleb128 0xf
	.4byte	.LASF56
	.byte	0x1
	.byte	0x36
	.4byte	0x3e1
	.byte	0x5
	.byte	0x3
	.4byte	MAGIC.4598
	.byte	0
	.uleb128 0x10
	.4byte	0x3db
	.uleb128 0x11
	.byte	0
	.uleb128 0xb
	.byte	0x4
	.4byte	0x3d4
	.uleb128 0x12
	.4byte	0x57
	.uleb128 0xe
	.4byte	.LASF57
	.byte	0x1
	.byte	0x2d
	.4byte	0x30
	.byte	0x1
	.byte	0x1
	.byte	0
	.section	.debug_abbrev,"",%progbits
.Ldebug_abbrev0:
	.uleb128 0x1
	.uleb128 0x11
	.byte	0x1
	.uleb128 0x25
	.uleb128 0xe
	.uleb128 0x13
	.uleb128 0xb
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x1b
	.uleb128 0xe
	.uleb128 0x55
	.uleb128 0x6
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x52
	.uleb128 0x1
	.uleb128 0x10
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x2
	.uleb128 0x24
	.byte	0
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3e
	.uleb128 0xb
	.uleb128 0x3
	.uleb128 0xe
	.byte	0
	.byte	0
	.uleb128 0x3
	.uleb128 0x16
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x4
	.uleb128 0x24
	.byte	0
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3e
	.uleb128 0xb
	.uleb128 0x3
	.uleb128 0x8
	.byte	0
	.byte	0
	.uleb128 0x5
	.uleb128 0x35
	.byte	0
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x6
	.uleb128 0x1
	.byte	0x1
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x7
	.uleb128 0x21
	.byte	0
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2f
	.uleb128 0xb
	.byte	0
	.byte	0
	.uleb128 0x8
	.uleb128 0x13
	.byte	0x1
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x9
	.uleb128 0xd
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x38
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0xa
	.uleb128 0x16
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0xb
	.uleb128 0xf
	.byte	0
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0xc
	.uleb128 0x2e
	.byte	0x1
	.uleb128 0x3f
	.uleb128 0xc
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x27
	.uleb128 0xc
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x40
	.uleb128 0x6
	.uleb128 0x2117
	.uleb128 0xc
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0xd
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0xe
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x3f
	.uleb128 0xc
	.uleb128 0x3c
	.uleb128 0xc
	.byte	0
	.byte	0
	.uleb128 0xf
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x10
	.uleb128 0x15
	.byte	0x1
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x11
	.uleb128 0x18
	.byte	0
	.byte	0
	.byte	0
	.uleb128 0x12
	.uleb128 0x26
	.byte	0
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.byte	0
	.section	.debug_loc,"",%progbits
.Ldebug_loc0:
.LLST0:
	.4byte	.LFB0
	.4byte	.LCFI0
	.2byte	0x2
	.byte	0x7d
	.sleb128 0
	.4byte	.LCFI0
	.4byte	.LCFI1
	.2byte	0x2
	.byte	0x7d
	.sleb128 4
	.4byte	.LCFI1
	.4byte	.LFE0
	.2byte	0x2
	.byte	0x7b
	.sleb128 4
	.4byte	0
	.4byte	0
	.section	.debug_aranges,"",%progbits
	.4byte	0x1c
	.2byte	0x2
	.4byte	.Ldebug_info0
	.byte	0x4
	.byte	0
	.2byte	0
	.2byte	0
	.4byte	.LFB0
	.4byte	.LFE0-.LFB0
	.4byte	0
	.4byte	0
	.section	.debug_ranges,"",%progbits
.Ldebug_ranges0:
	.4byte	.LFB0
	.4byte	.LFE0
	.4byte	0
	.4byte	0
	.section	.debug_line,"",%progbits
.Ldebug_line0:
	.section	.debug_str,"MS",%progbits,1
.LASF47:
	.ascii	"MC_ASR\000"
.LASF49:
	.ascii	"MC_FMR\000"
.LASF27:
	.ascii	"PMC_PCKR\000"
.LASF52:
	.ascii	"AT91PS_MC\000"
.LASF38:
	.ascii	"RSTC_RMR\000"
.LASF22:
	.ascii	"PMC_MCFR\000"
.LASF48:
	.ascii	"MC_AASR\000"
.LASF59:
	.ascii	"sam7s256_init.c\000"
.LASF43:
	.ascii	"WDTC_WDSR\000"
.LASF35:
	.ascii	"_AT91S_RSTC\000"
.LASF61:
	.ascii	"sam7s256_init\000"
.LASF20:
	.ascii	"Reserved1\000"
.LASF23:
	.ascii	"Reserved2\000"
.LASF21:
	.ascii	"PMC_MOR\000"
.LASF19:
	.ascii	"PMC_PCSR\000"
.LASF55:
	.ascii	"LDR_PC_PC_0x18\000"
.LASF11:
	.ascii	"AT91_REG\000"
.LASF33:
	.ascii	"AT91PS_PMC\000"
.LASF50:
	.ascii	"MC_FCR\000"
.LASF1:
	.ascii	"unsigned char\000"
.LASF18:
	.ascii	"PMC_PCDR\000"
.LASF7:
	.ascii	"long unsigned int\000"
.LASF3:
	.ascii	"short unsigned int\000"
.LASF25:
	.ascii	"PMC_MCKR\000"
.LASF4:
	.ascii	"long int\000"
.LASF37:
	.ascii	"RSTC_RSR\000"
.LASF40:
	.ascii	"_AT91S_WDTC\000"
.LASF46:
	.ascii	"MC_RCR\000"
.LASF41:
	.ascii	"WDTC_WDCR\000"
.LASF13:
	.ascii	"PMC_SCER\000"
.LASF0:
	.ascii	"signed char\000"
.LASF45:
	.ascii	"_AT91S_MC\000"
.LASF29:
	.ascii	"PMC_IER\000"
.LASF56:
	.ascii	"MAGIC\000"
.LASF60:
	.ascii	"C:\\Users\\Adam\\Desktop\\Adam\\University\\2012\\S"
	.ascii	"ummer Scholarship\\SVN Repository for CubeSat\\Soft"
	.ascii	"ware\\workspace\\led_test_sam7s256\000"
.LASF57:
	.ascii	"__ram_start\000"
.LASF10:
	.ascii	"unsigned int\000"
.LASF16:
	.ascii	"Reserved0\000"
.LASF9:
	.ascii	"long long unsigned int\000"
.LASF5:
	.ascii	"uint8_t\000"
.LASF26:
	.ascii	"Reserved3\000"
.LASF28:
	.ascii	"Reserved4\000"
.LASF53:
	.ascii	"reset_addr\000"
.LASF24:
	.ascii	"PMC_PLLR\000"
.LASF12:
	.ascii	"sizetype\000"
.LASF8:
	.ascii	"long long int\000"
.LASF34:
	.ascii	"_AT91S_PMC\000"
.LASF51:
	.ascii	"MC_FSR\000"
.LASF32:
	.ascii	"PMC_IMR\000"
.LASF42:
	.ascii	"WDTC_WDMR\000"
.LASF58:
	.ascii	"GNU C 4.7.2\000"
.LASF44:
	.ascii	"AT91PS_WDTC\000"
.LASF2:
	.ascii	"short int\000"
.LASF31:
	.ascii	"PMC_SR\000"
.LASF36:
	.ascii	"RSTC_RCR\000"
.LASF17:
	.ascii	"PMC_PCER\000"
.LASF6:
	.ascii	"uint32_t\000"
.LASF54:
	.ascii	"return_addr\000"
.LASF15:
	.ascii	"PMC_SCSR\000"
.LASF39:
	.ascii	"AT91PS_RSTC\000"
.LASF14:
	.ascii	"PMC_SCDR\000"
.LASF30:
	.ascii	"PMC_IDR\000"
	.ident	"GCC: (GNU) 4.7.2"

I think if someone can explain why that line would cause a data abort when running from the remap region, and not when running from the flash region, that would allow me a full understanding of the problem and why my fix works. This would be greatly appreciated. Thanks in advance.