Hi,
I’m trying to erase lpc1768 but for some reason it does not erase first sector. Other sectors are erased.
Here is debug listing from openocd.
Debug: 261 4038 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_flash erase_sector 0 0 last
Debug: 262 4038 command.c:133 script_debug(): command - ocd_flash ocd_flash erase_sector 0 0 last
Debug: 264 4043 target.c:1072 target_alloc_working_area(): MMU disabled, using physical address for working memory 0x10000000
Debug: 265 4043 target.c:1134 target_alloc_working_area(): allocated new working area at address 0x10000000
Debug: 266 4052 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0x0
Debug: 267 4059 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0xffff0000
Debug: 268 4067 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0xffffffff
Debug: 269 4072 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x0
Debug: 270 4082 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0x2009c000
Debug: 271 4090 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x2
Debug: 272 4097 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0x40008000
Debug: 273 4106 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0x0
Debug: 274 4114 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0x4002c000
Debug: 275 4121 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0x9474c118
Debug: 276 4130 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0xf3e3895c
Debug: 277 4138 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0xc1a584be
Debug: 278 4145 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0x107
Debug: 279 4154 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0x100000b4
Debug: 280 4162 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0x1fff167b
Debug: 281 4169 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x10000004
Debug: 282 4178 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x61000003
Debug: 283 4186 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0x100000b4
Debug: 284 4193 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0x9fef1fe8
Debug: 285 4202 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x1
Debug: 286 4210 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 287 4217 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 288 4226 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 289 4226 target.c:1251 target_write_buffer(): writing buffer of 24 byte at 0x10000008
Debug: 290 4231 target.c:1251 target_write_buffer(): writing buffer of 20 byte at 0x10000020
Debug: 291 4234 target.c:1565 target_write_u32(): address: 0xe0002008, value: 0x50000005
Debug: 292 4237 cortex_m3.c:963 cortex_m3_set_breakpoint(): fpc_num 0 fpcr_value 0x50000005
Debug: 293 4237 cortex_m3.c:999 cortex_m3_set_breakpoint(): BPID: 0, Type: 0, Address: 0x10000004 Length: 2 (set=1)
Debug: 294 4237 breakpoints.c:102 breakpoint_add(): added hardware breakpoint at 0x10000004 of length 0x00000002, (BPID: 0)
Debug: 295 4237 armv7m.c:129 armv7m_restore_context():
Debug: 296 4254 cortex_m3.c:1458 cortex_m3_store_core_reg_u32(): write special reg 19 value 0x1
Debug: 297 4254 armv7m.c:242 armv7m_write_core_reg(): write core reg 19 value 0x1
Debug: 298 4261 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 16 value 0x61000003
Debug: 299 4261 armv7m.c:242 armv7m_write_core_reg(): write core reg 16 value 0x61000003
Debug: 300 4270 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 15 value 0x10000000
Debug: 301 4270 armv7m.c:242 armv7m_write_core_reg(): write core reg 15 value 0x10000000
Debug: 302 4278 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 14 value 0x10000005
Debug: 303 4278 armv7m.c:242 armv7m_write_core_reg(): write core reg 14 value 0x10000005
Debug: 304 4285 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 13 value 0x100000b4
Debug: 305 4285 armv7m.c:242 armv7m_write_core_reg(): write core reg 13 value 0x100000b4
Debug: 306 4295 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 12 value 0x1fff1ff1
Debug: 307 4295 armv7m.c:242 armv7m_write_core_reg(): write core reg 12 value 0x1fff1ff1
Debug: 308 4301 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 1 value 0x10000020
Debug: 309 4301 armv7m.c:242 armv7m_write_core_reg(): write core reg 1 value 0x10000020
Debug: 310 4310 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 0 value 0x10000008
Debug: 311 4310 armv7m.c:242 armv7m_write_core_reg(): write core reg 0 value 0x10000008
Debug: 312 4314 target.c:968 target_call_event_callbacks(): target event 22 (debug-resumed)
Debug: 313 4314 cortex_m3.c:703 cortex_m3_resume(): target debug resumed at 0x10000000
Debug: 314 4318 cortex_m3.c:471 cortex_m3_poll():
Debug: 315 4318 cortex_m3.c:336 cortex_m3_debug_entry():
Debug: 316 4330 cortex_m3.c:151 cortex_m3_clear_halt(): NVIC_DFSR 0x3
Debug: 317 4342 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0x0
Debug: 318 4350 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0xc0000000
Debug: 319 4358 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0xffffffff
Debug: 320 4366 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x0
Debug: 321 4374 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0x2009c000
Debug: 322 4382 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x2
Debug: 323 4390 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0x40008000
Debug: 324 4398 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0x0
Debug: 325 4406 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0x4002c000
Debug: 326 4414 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0x9474c118
Debug: 327 4422 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0xf3e3895c
Debug: 328 4430 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0xc1a584be
Debug: 329 4438 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0x1fff1ff1
Debug: 330 4446 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0x100000b4
Debug: 331 4454 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0x1fff167b
Debug: 332 4463 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x10000004
Debug: 333 4469 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x41000003
Debug: 334 4478 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0x100000b4
Debug: 335 4486 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0x9fef1fe8
Debug: 336 4494 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x1
Debug: 337 4502 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 338 4510 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 339 4518 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 340 4526 cortex_m3.c:322 cortex_m3_examine_exception_reason(): HardFault SHCSR 0x0, SR 0x40000000, CFSR 0x30000, AR 0xffffffff
Debug: 341 4526 cortex_m3.c:396 cortex_m3_debug_entry(): entered debug state in core mode: Handler at PC 0x10000004, target->state: halted
Debug: 342 4526 target.c:968 target_call_event_callbacks(): target event 21 (debug-halted)
Debug: 343 4534 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x10000004
Debug: 344 4534 cortex_m3.c:1022 cortex_m3_unset_breakpoint(): BPID: 0, Type: 0, Address: 0x10000004 Length: 2 (set=1)
Debug: 345 4534 target.c:1565 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 346 4538 breakpoints.c:127 breakpoint_free(): free BPID: 0 --> 0
Debug: 347 4538 target.c:1333 target_read_buffer(): reading buffer of 20 byte at 0x10000020
Debug: 348 4542 armv7m.c:459 armv7m_run_algorithm(): restoring register xPSR with value 0x61000003
Debug: 349 4542 armv7m.c:459 armv7m_run_algorithm(): restoring register r12 with value 0x00000107
Debug: 350 4542 armv7m.c:459 armv7m_run_algorithm(): restoring register r1 with value 0xffff0000
Debug: 351 4542 lpc2000.c:368 lpc2000_iap_call(): IAP command = 50 (0x00000000, 0x0000001d, 0x00000fa0, 0xbfc72f04, 0x00000008) completed with result = 00000000
Debug: 352 4542 target.c:1251 target_write_buffer(): writing buffer of 24 byte at 0x10000008
Debug: 353 4546 target.c:1251 target_write_buffer(): writing buffer of 20 byte at 0x10000020
Debug: 354 4550 target.c:1565 target_write_u32(): address: 0xe0002008, value: 0x50000005
Debug: 355 4554 cortex_m3.c:963 cortex_m3_set_breakpoint(): fpc_num 0 fpcr_value 0x50000005
Debug: 356 4554 cortex_m3.c:999 cortex_m3_set_breakpoint(): BPID: 1, Type: 0, Address: 0x10000004 Length: 2 (set=1)
Debug: 357 4554 breakpoints.c:102 breakpoint_add(): added hardware breakpoint at 0x10000004 of length 0x00000002, (BPID: 1)
Debug: 358 4554 armv7m.c:129 armv7m_restore_context():
Debug: 359 4570 cortex_m3.c:1458 cortex_m3_store_core_reg_u32(): write special reg 19 value 0x1
Debug: 360 4570 armv7m.c:242 armv7m_write_core_reg(): write core reg 19 value 0x1
Debug: 361 4578 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 16 value 0x61000003
Debug: 362 4578 armv7m.c:242 armv7m_write_core_reg(): write core reg 16 value 0x61000003
Debug: 363 4586 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 15 value 0x10000000
Debug: 364 4586 armv7m.c:242 armv7m_write_core_reg(): write core reg 15 value 0x10000000
Debug: 365 4594 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 14 value 0x10000005
Debug: 366 4594 armv7m.c:242 armv7m_write_core_reg(): write core reg 14 value 0x10000005
Debug: 367 4602 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 13 value 0x100000b4
Debug: 368 4602 armv7m.c:242 armv7m_write_core_reg(): write core reg 13 value 0x100000b4
Debug: 369 4610 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 12 value 0x1fff1ff1
Debug: 370 4610 armv7m.c:242 armv7m_write_core_reg(): write core reg 12 value 0x1fff1ff1
Debug: 371 4618 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 1 value 0x10000020
Debug: 372 4618 armv7m.c:242 armv7m_write_core_reg(): write core reg 1 value 0x10000020
Debug: 373 4626 cortex_m3.c:1424 cortex_m3_store_core_reg_u32(): write core reg 0 value 0x10000008
Debug: 374 4626 armv7m.c:242 armv7m_write_core_reg(): write core reg 0 value 0x10000008
Debug: 375 4630 target.c:968 target_call_event_callbacks(): target event 22 (debug-resumed)
Debug: 376 4630 cortex_m3.c:703 cortex_m3_resume(): target debug resumed at 0x10000000
Debug: 377 4634 target.c:2041 target_wait_state(): waiting for target halted...
Debug: 378 4662 cortex_m3.c:471 cortex_m3_poll():
Debug: 379 4662 cortex_m3.c:336 cortex_m3_debug_entry():
Debug: 380 4674 cortex_m3.c:151 cortex_m3_clear_halt(): NVIC_DFSR 0x3
Debug: 381 4686 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0x0
Debug: 382 4694 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0xffffffff
Debug: 383 4702 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0xffffffff
Debug: 384 4710 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x40084fe0
Debug: 385 4718 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0x2009c000
Debug: 386 4726 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x2
Debug: 387 4735 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0x40008000
Debug: 388 4741 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0x0
Debug: 389 4750 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0x4002c000
Debug: 390 4758 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0x9474c118
Debug: 391 4766 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0xf3e3895c
Debug: 392 4774 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0xc1a584be
Debug: 393 4782 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0x490
Debug: 394 4789 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0x100000b4
Debug: 395 4798 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0x1fff167b
Debug: 396 4805 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x10000004
Debug: 397 4814 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x61000003
Debug: 398 4822 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0x100000b4
Debug: 399 4829 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0x9fef1fe8
Debug: 400 4838 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x1
Debug: 401 4846 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 402 4853 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 403 4862 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 404 4870 cortex_m3.c:322 cortex_m3_examine_exception_reason(): HardFault SHCSR 0x0, SR 0x40000000, CFSR 0x30000, AR 0xffffffff
Debug: 405 4870 cortex_m3.c:396 cortex_m3_debug_entry(): entered debug state in core mode: Handler at PC 0x10000004, target->state: halted
Debug: 406 4870 target.c:968 target_call_event_callbacks(): target event 21 (debug-halted)
Debug: 407 4877 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x10000004
Debug: 408 4877 cortex_m3.c:1022 cortex_m3_unset_breakpoint(): BPID: 1, Type: 0, Address: 0x10000004 Length: 2 (set=1)
Debug: 409 4877 target.c:1565 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 410 4882 breakpoints.c:127 breakpoint_free(): free BPID: 1 --> 0
Debug: 411 4882 target.c:1333 target_read_buffer(): reading buffer of 20 byte at 0x10000020
Debug: 412 4887 armv7m.c:459 armv7m_run_algorithm(): restoring register r12 with value 0x00000107
Debug: 413 4887 armv7m.c:459 armv7m_run_algorithm(): restoring register r3 with value 0x00000000
Debug: 414 4887 armv7m.c:459 armv7m_run_algorithm(): restoring register r1 with value 0xffff0000
Debug: 415 4887 lpc2000.c:368 lpc2000_iap_call(): IAP command = 52 (0x00000000, 0x0000001d, 0x00000fa0, 0xbfc72f04, 0x00000008) completed with result = 00000000
User : 416 4887 command.c:539 command_print(): erased sectors 0 through 29 on flash bank 0 in 0.844093s
Can anyone find out the reason? Does it have something to do with CPR1 register (Code read protection)?
I use jtagkey from Amontec and u-blox lpc1768 evaluation board from future. Openocd is 0.4.0 and libftd2xx 0.4.16 and I use ubuntu 8.04.
Testimies