So I have seen a few people ask this question in the forum, but have not seen a definitive answer…
What should you expect to see in your 3 preview files emailed back from BatchPCB?
My images look correct to me other than the fact the last image has no via holes. The 4 mount holes in the corners are there… as black holes but thats it. the components pads are all solid brown and so are the via’s
For example bottom left I have two pads Vin and GND both are 1.4mm holed pads, but there are no holes. all the transistor and resistor pads are also solid…
mhough:
So I have seen a few people ask this question in the forum, but have not seen a definitive answer…
What should you expect to see in your 3 preview files emailed back from BatchPCB?
Greetings (No Name Supplied),
The check plots are to catch gross errors, if you have doubts about process limits (clearance, line width, silk-screen text weight, etc.) use a third party Gerber viewer.
Remember that PCB data exchange does have a single file with every parameter, but rather layer data and drill data in two different formats (gerber and Excellon). It is normal for the BatchPCB check plots to have filled holes and vias.
If you used EAGLE, did you run a DRC? I see your style doesn’t follow the 45deg trace rules (which is okay), also you have some silk-screen text overlapping. Why 80k is that a standard value resistor?
This PCB is for a personal project… 80k, is not a standard value, it was a claculated value that i entered during schematic drawing. The component I put in there will be next highest… 82 I think. Thanks for the tip.
Also silkscreen overlay… I dont really mind. Space was tight, but not as tight as time, so I don’t mind… There is enough info visible to trouble shoot, as this is a proto.
The 45 deg trace rules… On a previous board the auto route had a tough time with 45 deg… I edited it to do vertical and horizontal and it worked much better, so the setting stuck. Please elaborate on the rule… Is 45 deg top and bottom the norm? I also tweaked a few traces using a different grid to the autorouter so they are a bit wonky… again, its a proto…
So yes I did run a drc and it had a few clearance error’s which I can ignore. Silkscreen overlap, I don’t mind.
So aside from a few cosmetic issues the image isnt expected to reveal all holes and via’s?
mhough:
The 45 deg trace rules… Please elaborate on the rule… Is 45 deg top and bottom the norm? I also tweaked a few traces using a different grid to the autorouter so they are a bit wonky… again, its a proto
Greetings Mart,
AFAIK 45 degree trace design rules date back a long time, and relate to PCB production yields. I’ve heard two reasons:
(1) Manual tape-on-mylar PCB design. The sticky black layout tape would be cut by hand to approximately 2/3 width and sent in a new direction on a 45 degree bend. This junction insures the cut line wasn’t exposed and become etched (thus creating an electrical failure).
(2) The 45 degree corners prevent etchant from building up as the board is aggitated (vertically), thus undercutting the metal, and again resulting in electrical failure.
Most likely these rules have been made obsolete by better process control. I’ve found that 45 degree corners (in CAD layouts) increase the trace density, improve route paths (when manual routing) and make the finished board design easier to visually check. Obviously, random trace placement will also work as long as it passes DRC.
In my own work I’ve found numerous errors on a ‘finished’ layout by running the DRC a second time with the 45 degree rule turned on, so I always apply 45 degree corners manually from the start.
mhough:
So aside from a few cosmetic issues the image isnt expected to reveal all holes and via’s?
Correct! Okay on the other points, it’s your board and you set the standards for appearance and content.
So I’ve been playing around with my traces, and I think I understand now the 45 deg bends. The mitre function was on, but set to curved. I swapped to 45 deg angle, but still nothing was happening, then I set my mitre to 10, and bingo, all turns in the tracks have a 45. Thanks again for the help Bigglez
Just wanted to add a note about how the plotting works - what you’re currently seeing is a composite of 3 layers drawn over black. The top copper is first rendered as the “copper color”. Over that the soldermask layer is rendered in a semi-transparent green. On top of that, the silkscreen is drawn.
So the black you are seeing is not holes - just merely a lack of copper or soldermask. Like someone above said, those plots are just to catch gross alignment errors [like mirroring silkscreen or something].
I plan to eventually add support for parsing the drill files + advanced checking, but thats a ways off.
