I have played with some SMD designs but never anything to this extent. What I am trying to make is a boost converter for high current LED’s. The input voltage is around 12V 4A Output 4V 12A. The components are all correct but I do not know how to route the power traces especially when it comes to the SMD mosfets and capacitors. I could use planes but to me it does not look like any boards I have seen. Please add some input.
http://i141.photobucket.com/albums/r47/ … uy/pcb.png
The chip suppliers generally have PCB layout details in their data sheets. Stick to those unless you know what you are doing.
http://www.infineon.com/dgdl/BSC016N03M … 4a19bb0334
The datasheet doesn’t really specify trace sizes to use it just shows basic specifications and the footrpint.
What chip are you using?
Data Sheet posted above 
The data sheet is for the MOSFET switches.
So Leon’s question still stands: What Chip are you using?
The DC-DC control chip? That should have a lay-out guide in the Application section.
Routing the traces to the IC and other components is trivial. The high current lines between the capacitors mosfets and the inductor is where I am struggling.
Too thin a PCB track will just run hot and waste power. Here is a good graph, taking into account copper thickness and track thickness and temperature rise: http://www.apcircuits.com/ click → Technology & Resources → Amperage chart–> shows 12A, 1oz Cu, 20C rise, use 0.18" wide trace. Polygon pours will work fine.
For the switcher IC there are two main current loops - inductor charge (top fet on), inductor discharge (bottom fet on). The third current loop is the inductor dumping into the output capacitor, then that into the LED’s. I would use star grounding for the switcher IC and there are some critical traces. What frequency are you going to run?
The FETs must be as close to the inductor (=short trace runs) and the GND trace on the bottom FET is critical to return to the power input GND input node, also where the SGND needs to go. Otherwise noise will can make the switcher unstable. The LED’s are high current filtered DC so less critical layout.
Check out the PCB for the LM2743 eval board, it shows some of these concepts. I didn’t like the use of vias for the fet gnd. http://www.national.com/an/AN/AN-1356.pdf
Not a great data sheet as there isn’t a layout guide.
However, the inportant connections that need to be short and heavy (can be pours)
is the paths from the input cap to the MOSFETs and out through the inductor to the output cap.
Place these parts first and close together as this is where there are high current circulation.
Then place the other parts around the LM2743, keep trace lengths short.
Pour as much ground plane as you can directly to the GND pins of the chip and MOSFETs.
You may some some help by looking at the data sheets and app notes for DC-DC switches from Linear Tech.
http://www.linear.com/designtools/app_notes.php#power
AN117 shows some layout.
Redwire posted just before I hit the button.
His suggestions are very good and he found an app note that should be useful.
That helps alot thank you. I will re-arrange the components for closer spacing and try to minimize trace length.
When creating the pours…Should I make the connections solid or have the pours isolate with trace like connections to the components? This is an option with the polygon feature. Also it was very hard to make the drain pad for the fets. Polygons cant be made into a single pad that I know of so I had to make the footprint of the drain with 5 pads and add some pins to the symbol to link them all. This I feel is not optimal but a limitation of Eage?
The polygon pours usually need thermal reliefs (the “trace like connections to the components”) so you can heat the component pads enough to solder the part. Otherwise the pcb acts as a heatsink. Not needed so much if hot air/reflow oven is used, but for repairs etc.
Be careful with the trace thickness of the thermal reliefs. I used 4 at 15thou ea. and find they melt like a fuse at high currents!
If you think the fets will dissipate some heat, then I would keep a solid copper pour (no thermal reliefs) on the drain pad to carry heat away.
I don’t know Eagle well, but the drain pad is just a big square pad? I don’t use poly’s when making components.
I’ll try to get the board layout done and post it here for review/input
Post the schematic at the same time
Consider your currents down vias too - the higher the current the more vias you need.
This is the schematic from the design software. I have a few fixes I need to do on the eagle .sch that I drew up. I am going to fix that and post what I have for the PCB. I’ll try to get that done later tonight.
http://i141.photobucket.com/albums/r47/ … uy/SCH.jpg
Well I made some changes and changed the board layout. I am a little OCD with the placing and looks of things. I do not like how the polygon feature works for pours. I felt that I have better control just placing rectangles so I choose that route for the higher current tracks. Have a look and please give feedback.
The un-finished connects are due to the fact that rectangles don’t involve signals and cannot be named.
http://i141.photobucket.com/albums/r47/ … uy/BRD.jpg
Hi, a good start however here are a few questions & suggestions - I have marked the image to identify where I mean
as you dont have any legend on yet.
http://i173.photobucket.com/albums/w64/ … /BRD-1.jpg
A) This comes out the chip & vias over a track to get to the same plane that is underneath it all.
rotate the resistor AC (anti clockwise) 90 degrees and move it nearer the IC pin then via the gnd pad.
B) + C) ALL the pads in these areas look to be via’ing down to the ground below - is this right?
Or is there clearance in the plane from some?
Move F to f
Move G to g
Rotate E 90 AC and move to left of i
I move to i and via above, moving H to above left of it.
D - these are all way too spaced out and could be far closer to each other with shorter leads - try rotating them some more
and repositioning them.
J - I’d pull this down further away from the screw head area.
The schematic has no junction points where the junctions are - these are little circles that show it is joined at this point.
Also there seems to be less electrolytic s than actually on the Vin on the PCB.
A transistor less to?
I think I’ll have to install this Eagle software so I can understand it better I’m more used to CADSTAR but the principles are the same.
OK done that - now to learn how it works :Dmattylad:
I think I’ll have to install this Eagle software so I can understand it better.
I will adjust the components and post the update as soon as I can. The vias below the caps are terminals for input/output voltage. The other vias in the C areas are just for added surface area for top to bottom ground connection. Much of the spacing was left to make soldering the components easier. I can space them closer if it will affect the circuit. The schematic also was from the design software. I added the nodes in the eagle schematic which I will also post.
The transistor looking thing at the bottom is a voltage regulator that I added to power the IC. It prob needs some output noise filtering added…
Thank You
Here is what I came up with after reducing the spacing. I hope the parts are spaced far enough to solder.
Let me know if any other flaws are noticed or modifications needed. Thanks…
http://i141.photobucket.com/albums/r47/ … /BRD11.jpg http://i141.photobucket.com/albums/r47/ … 11zoom.jpg
