I’ve written a small program in IAR EWARM to test SPI. It runs, but SCLK and MOSI do not show up on the oscilloscope. Here’s the code, which actually makes SPI transactions:
while(1)
{
S0SPCCR = 32; // SCLK rate
S0SPCR =
0x00000000 | // MOSI valid on raising edge of SCLK (CPOL=CPHA=0)
0x00000020 | // master (AD7390 DAC is the slave)
0x00000000 | // MSbit first
0x00000000 | // SPI interrupt inhibited
0x000C0004; // transmit 12 bits (BitEnable, BITS)
DAC_xLD_FSET = DAC_xLD_MASK; // drive LD# high
S0SPDR = 0x7FF; // write to the data register (this will start the transmission and clear the SPIF bit)
while ( !(S0SPSR & 0x80) ); // poll SPIF bit for the end of transaction
DAC_xLD_FCLR = DAC_xLD_MASK; // drive LD# low (data gets written from serial shift register to DAC register)
}
With a scope, I can see the LD# line toggle up and down, so this program doesn’t hang while polling for SPIF. Rang-out the wiring - it seems to be correct. Nothing is shorted to Vcc or GND. Added a pullup and enabled SSEL in PINSEL3, following this advice: http://tech.groups.yahoo.com/group/lpc2000/message/4363. Checked that PINSEL doesn’t get overwritten. But still no clock.
Here’s what I use on an LPC2106 talking via SPI to/from a WizNet 812MJ. Using IAR’s C.
S0SPCCR = 8; // clock=PCLK/8. Divisor is an even number greater than or equal to 8
// for PCLK=14745600, SPI clock = 1,843,200bps, or 23,400 bytes/sec or 4.3uSec per byte
S0SPCR = (1<<SPCR_MSTR); // set master mode, clock polarity and phase. 8 bit mode, MSB first
void SPIout(uint8_t data) {
// wait until SPI bus is free
S0SPDR = data;
while( (S0SPSR & (1<<SPSR_SPIF)) == 0)
{};
// write SPI data
}
I wish the SPI bit rate could be faster as on an Atmel AVR I do 8Mbps
EDIT: added this per request for subsequent posting.
void spiInit(void) {
// SPI interface
PINSEL0 &= ~0x7F00; // clear bits
PINSEL0 |= (0x5500); // 0b01010101 in those bits, for SPI config
IO0DIR |= (unsigned int)(1<<Wiz5100SCS_BITNO); // output bit for slave chip select
IO0SET = (unsigned int)(1<<Wiz5100SCS_BITNO);
S0SPCCR = 8; // clock=PCLK/8. Divisor is an even number greater than or equal to 8
// for PCLK=14745600, SPI clock = 1,843,200bps, or 23,400 bytes/sec or 4.3uSec per byte
S0SPCR = (1<<SPCR_MSTR); // set master mode, clock polarity and phase. 8 bit mode, MSB first
}
It was a hardware problem. I have mixed-up SSP0 pins (34, 37, 38) and SPI pins (60, 61, 62). This is my 1st design with LPC2000.
The LPC23XX user manual says that SSP can be an SPI master. Out of curiosity: why does the chip have 2 SSPs, which can do all SPI functions, and a redundant dedicated SPI peripheral ?