Start-up problem, Olimex LPC2103 eval board

I’m very new to ARM, and I am trying to seperate tool problems, from hardware problems, from software problems.

This Olimex LPC2103 eval board has a green LED connected to P0.26. If I could drive P0.26 low under software control, I could get it to turn on. While trying to take out as much variabilty as possible, I’ve gone into startup.s (this is actually a “C” project) and added code (assembly) to initialize P0.24-31 as outputs and drive all the port lines on this port low. But, no GRN LED.

I’m using Eclipse and OpenOCD to flash the part. It appears that the flash is being programmed from looking at the output stream in the Console window.

Open On-Chip Debugger 0.4.0 (2010-02-22-19:05)

Licensed under GNU GPL v2

For bug reports, read

http://openocd.berlios.de/doc/doxygen/bugs.html

2000 kHz

trst_and_srst srst_pulls_trst srst_gates_jtag trst_push_pull srst_open_drain

jtag_nsrst_delay: 100

jtag_ntrst_delay: 100

1000 kHz

Info : clock speed 1000 kHz

Info : JTAG tap: lpc2103.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4)

Info : Embedded ICE version 4

Info : lpc2103.cpu: hardware has 2 breakpoint/watchpoint units

Info : JTAG tap: lpc2103.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4)

Warn : srst pulls trst - can not reset into halted mode. Issuing halt after reset.

target state: halted

target halted in ARM state due to debug-request, current mode: Supervisor

cpsr: 0x600000d3 pc: 0x0000007c

Warn : NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type ‘help dcc’.

Warn : NOTE! Severe performance degradation without fast memory access enabled. Type ‘help fast’.

auto erase enabled

auto unlock enabled

wrote 4096 bytes from file test_rom.hex in 1.015625s (3.938 kb/s)

Info : JTAG tap: lpc2103.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4)

Warn : srst pulls trst - can not reset into halted mode. Issuing halt after reset.

target state: halted

target halted in ARM state due to debug-request, current mode: Supervisor

cpsr: 0x600000d3 pc: 0x0000005c

Warn : NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type ‘help dcc’.

Warn : NOTE! Severe performance degradation without fast memory access enabled. Type ‘help fast’.

shutdown command invoked

Code is being linked at starting address 0x0000 0000

Code compiled for ARM mode, not Thumb

	.equ	FIO0DIR3,		0x03
	.equ	FIO0MASK3,		0x13
	.equ	FIO0PIN3,		0x17


    .text
    .code 32

    .global _start
    .func   _start

_start:

/*****************/
/* Vector table  */
/*****************/

    LDR     pc, ResetAddr    /* Reset */
    LDR     pc, UndefAddr    /* Undefined instruction */
    LDR     pc, SWIAddr      /* Software interrupt */
    LDR     pc, PAbortAddr   /* Prefetch abort */
    LDR     pc, DAbortAddr   /* Data abort */
	.word   0xb8a06f58 	  	 /* Exception Vector Checksum */
    LDR     pc, IRQAddr      /* IRQ interrupt */
    LDR     pc, FIQAddr      /* FIQ interrupt */
    
ResetAddr:     	.word _reset
UndefAddr:     	.word UndefHandler
SWIAddr:       	.word SWIHandler
PAbortAddr:    	.word PAbortHandler
DAbortAddr:    	.word DAbortHandler
ReservedAddr:	.word 0xB8A06F58	/* no real purpose to this other than maintaining spacing for pc relative */
IRQAddr:       	.word IRQHandler
FIQAddr:       	.word FIQHandler

    .align 4             			/* Align to the word boundary */


/**********/
/* RESET  */
/**********/

_reset:

 /******************************************************/
 /* Initialize Fast I/O P0.24 - P0.31 as outputs       */
 /* Drive P0.24 - P0.31 low, P0.26 is GRN LED (low=ON) */
 /******************************************************/

 	LDR		r0,=0x3FFFC000		/* Load Fast I/O base address */

 	MOV		r1,#0xFF			/* P0.24 - P0.31 all outputs */
 	STR		r1,[r0,#FIO0DIR3]	/* DIR3 P0.24 - P0.31 */

 	MOV		r1,#0x00			/* enable all, active low */
 	STR		r1,[r0,#FIO0MASK3]	/* MASK3 P0.24 - P0.31 */

 	MOV		r1,#0x00			/* P.26, low turns on GRN LED */
 	STR		r1,[r0,#FIO0PIN3]	/* PIN3 P0.24 - P0.31  */

/*********************/
/* Loop forever      */
/*********************/

forever:
	b	forever

Could anyone provide any guidance. I may try to flash the part with the built in bootloader next to eliminate the Olimex ARM-USB-TINY from the equation, but it looks like it’s working.

I’ve not done anything with my 21xx boards for a couple of months so I probably won’t get the details right. But here is one area to look at:

On the 21xx, you need to set bit 0 in the SCS (System Control and Status) register to use the FIO ports. Until you do that, you can only use the slow/legacy GPIO ports (IO0PIN rather than FIO0PIN, and so forth).

In my userman the SCS itself is described in section 6.7.1, but the explanation is in the GPIO section.

hsutherl,

Thank you very much. Setting the “GPIO0M” bit in SCS to enable fast I/O solved the problem.