I’ve been using the LPC-L2294 1MB SRAM board for all sorts of things - I really like it. I run my own RT networking kernel, which is < 100k so fits just fine in the internal on-chip 256k flash along with plenty of application code. At 58MHz the thing positively flies. But it could be improved in a few ways:
The CS8900A ethernet controller: requires interrupts to be disabled while transferring received frames. This adds tons of interrupt latency and pretty much prevents simultaneous real-time and network load. Also, it’s extremely slow at 135ns per 16-bit read. At 8ws per read copying out a received 1460 byte frame into a buffer in 0ws SRAM takes ~7500 cycles, or 0.13msec. Never mind if using the slower SDRAM version of the board. Plus: it’s 10BT half duplex (in 2009? c’mon!), have INTR’s and other signals active high (making the current sinks when unused/idle!), can’t auto negotiate 10BT due to its HDX nature, and can’t interrupt on link status changes. Meaning it has to be manually negotiated and continuously polled to detect link loss. (So the board can re/acquire a DHCP lease when plugged back in.) It’s 2009… lets retire this controller to history where it really should have been relegated long ago. How about the same board with an LPC2468? That would really tickle me in all the right places…
I love the ADDR/DATA connectors. Using floppy cables is brilliant! But if I may suggest a change: on the ADDR connector, swap out the high 8 bits of the addr for D0-D7. This way a peripheral board that’s fine with an 8-bit data path and an abbreviated address space would require only a single connector (and a single cable, if like me you create your expansion cables by cutting old PC floppy cables in half). To go wider or bigger the second cable could be added. This would simplify cabling in what has to be the by far typical case.