there is some missing code for the thumb-disassembler:
[quote]Index: src/target/arm_disassembler.c
===================================================================
--- src/target/arm_disassembler.c (Revision 198)
+++ src/target/arm_disassembler.c (Arbeitskopie)
@@ -1325,14 +1325,15 @@
{
u32 offset = opcode & 0x7ff;
u32 opc = (opcode >> 11) & 0x3;
- u32 target_address;
+ u32 target_address;
+ static u32 high_address;
char *mnemonic = NULL;
/* sign extend 11-bit offset */
if (((opc==0) || (opc==2)) && (offset & 0x00000400))
offset = 0xfffff800 | offset;
- target_address = address + 4 + (offset<<1);
+ target_address = address + 2 + (offset<<1);
switch(opc)
{
@@ -1340,22 +1341,28 @@
case 0:
instruction->type = ARM_B;
mnemonic = "B";
+ target_address += high_address;
+ high_address = 0;
break;
/* BLX suffix */
case 1:
instruction->type = ARM_BLX;
mnemonic = "BLX";
+ target_address += high_address;
+ high_address = 0;
break;
/* BL/BLX prefix */
case 2:
instruction->type = ARM_UNKNOWN_INSTUCTION;
mnemonic = "prefix";
- target_address = offset<<12;
+ high_address = target_address = offset<<12;
break;
/* BL suffix */
case 3:
instruction->type = ARM_BL;
- mnemonic = "BL";
+ mnemonic = "BL";
+ target_address += high_address;
+ high_address = 0;
break;
}
/* TODO: deals correctly with dual opcodes BL/BLX ... */
Index: src/target/armv4_5.c
===================================================================
--- src/target/armv4_5.c (Revision 198)
+++ src/target/armv4_5.c (Arbeitskopie)
@@ -447,9 +447,18 @@
thumb = 1;
for (i = 0; i < count; i++)
- {
- target_read_u32(target, address, &opcode);
- arm_evaluate_opcode(opcode, address, &cur_instruction);
+ {
+ if (thumb)
+ {
+ u16 opcode;
+ target_read_u16(target, address, &opcode);
+ thumb_evaluate_opcode(opcode, address, &cur_instruction);
+ }
+ else
+ {
+ target_read_u32(target, address, &opcode);
+ arm_evaluate_opcode(opcode, address, &cur_instruction);
+ }
command_print(cmd_ctx, "%s", cur_instruction.text);
address += (thumb) ? 2 : 4;
}
[/quote]
accepted??