Use of capacitors to filter noise and peaks

Hello,

I am designing a board to control a CNC machine, and I was advised by my professor to add capacitors between GND and Vcc (+5V) and also add filters to filter noise, which is something I see very often in printed boards, but he is unable to explain me how I would calculate how much F the capacitor should have and also how to project such filters. Any ideas how to do that or where to acquire the knowledge necessary for that?

I beleave I would need a capacitor between GND and +5V to avoid tension sparts when turning power on/off, maybe also between GND and +12V.

About the filters, not sure, but maybe between the ULN2003 which separates the digital from analog part and the motor.

In my circuit I have basically a USB chip, a PIC and a series of 1 Register and 1 ULN2003 for each motor.

My board works without any capacitors or filters, but I assume I should add them as a precaution.

thanks,

sekelsenmat:
but he is unable to explain me how I would calculate how much F the capacitor should have and also how to project such filters. Any ideas how to do that or where to acquire the knowledge necessary for that?

http://www.google.com/search?hl=en&clie … tnG=Search

You do not need to calculate the size. Just use a ceramic capacitor from .01 to .1 uFd. I have 78 .1uFd 0805 size caps on one DSP board I designed. Poly caps work too but do not bypass as well. You need a cap with as low an inductance as reasonably possible and 0805 SMT caps work fine. But use through hole if you must.

You put them from every VCC pin to ground. And you make sure the power goes to the capacitor then to the chip. If the power goes to the chip before it gets to the cap, the caps loses 90% of its effectiveness. And the ground end of the capacitor needs to go to the heaviest ground you can provide. To a ground plane if possible.

for digital stuff, you are pretty safe with that advice.

however, this is CNC and there are lots of power hungry chips out there. The default for each IC should be a 100 nF cap but I’d look at the datasheets for all the devices. If you’ve got proximity switches at the end of a long wire, think about a bypass cap for it. The V+ input on the motor controller chips should have fairly large caps - see the datasheet it will usually give you guidance. Since they go from full off to full on at several (or more) Amps, you will want to give them as much help as possible.

Also, have different supplies for your different voltages - don’t derive them off the same rail. Your logic supply (5V, probably) should have a beefy set of caps. If you have any 12V relays or indicators, keep that supply separate as well. You motor supply should definitely be separate and I would most definitely consider heavy duty caps there. Your motors can draw a lot of current starting up or stalled.

chuckles:
And you make sure the power goes to the capacitor then to the chip. If the power goes to the chip before it gets to the cap, the caps loses 90% of its effectiveness. And the ground end of the capacitor needs to go to the heaviest ground you can provide. To a ground plane if possible.

This is what makes your system passes the EMI certification. It makes a huge difference. :oops:

What do you do if you have a multilayer board with a dedicated power plane, if I put the bypass caps on the other side of the part directly near it’s VCC pins and a via to connect them together, the power plane polygon pour attaches to this via, is that still reducing it’s functionality by 90%? Or should I put two via’s, and a polygon cutout around the other via to force it to go via one via to the cap and then back up the other to the vcc pin? :\

With high-performance multilayer boards the capacitors are often placed on the opposite side to the chip, with very short track lengths to the vias, and two vias per pad, to minimize inductance. They are never connected to the pins, as that would introduce too much inductance. They sometimes use plugged vias in the pads (very expensive), to lower the inductance still further.

Leon

Ah ok, I think I did it O.K. then :S I made a board a few months ago with a AT91SAM9G20 on it (400MHz ARM9 Linux SOC), it’s been working perfectly but I just never knew if I did the bypass cap’s right, here’s a screen shot of the best I could do (the bottom layer has a ground plane on it, not shown):

http://img190.imageshack.us/img190/3787/capq.png

All the caps are as close as possible to the device’s power pins, but as you can see even with 0402 parts they’re hard to fit in with the number of other via’s around. The other option could’ve been to use blind via’s so I could move the caps closer, but that increased board cost by around 40%.

Is there any better way to do this? I can’t really fit in two via’s. It might just be blind luck that it’s working :stuck_out_tongue: I have one in my garage doing various things with it’s IO running off solar/batteries and serving up webcam images. It’s also running jabber so I can control it via IM;

[11:38:14 PM] Rowan: demo1 uptime

[11:38:15 PM] Demo1: 15:15:36 up 147 days, 5:15, load average: 0.00, 0.00, 0.00

Simple script that takes linux commands and runs them, returning the reply :slight_smile:

Also, slighly OT (sorry for hijacking this thread!) - with 6+ layer boards, someone had recommended to me after I had this made that I should’ve done Top Layer - Ground - Upper Layer - Lower Layer - Power - Bottom Layer , does this make much difference?

If your board works, then I wouldn’t worry too much. You could stress test your design to get some peace of mind…

The caps you show are pretty close to the vias. You should think in terms of minimizing the loop from package to cap. Do you have a ground plane on the Bottom layer, as well as the Ground layer? If you have two ground planes you should “stitch” them together with lots of vias.

In terms of stackup, you generally want to couple fast signals to a ground/power plane for EMI reasons. The stackup signal/plane/signal/signal/plane/signal achieves this, provided the signal/plane thickness is small.

http://www.hottconsultants.com/techtips … -up-1.html

Another consideration is keeping things symmetrical stackup-wise. If you’ve got, say, plane/plane/signal/signal, the absence of copper on the signal side of the board will cause the board to warp, though this is not that big a deal unless you have fairly large boards.

Very helpful reply, thanks mako1138 :slight_smile:

Yes there is a ground plane on the bottom layer as well as on the ground layer, and there are ground via’s placed quite often, next to every ground pin/ball on the package as well as most unused pins too. There’s also a ring of via’s that run around the edge of the board (as well as via’s wherever ground is required on either side of the board). Is there any reason not to use a ground plane on ALL layers (except the power layer, where I usually have a 3.3v power plane, is even that OK?)? Or is it generally not advised to use them on signal layers?

Thanks again

Having a power plane is pretty standard. Laying down ground copper on signal layers usually not necessary, though it can be done. The main caveats are 1) if you lay ground copper near signal lines there’ll be additional capacitance 2) bits of copper that aren’t well-connected to the main plane can act as antennas, or create odd resonances. Sometimes you need more copper (for heat conduction, EMI, or keeping a stackup symmetrical), but in general it’s not necessary. Don’t be afraid to do it as long as you know what you’re doing, though.