Maybe some of you remember my problems with the MLF32 and traces I had. That problem was solved, but I run into a new problem.
I had to add a ground to my schematic. No problem of course, but when I switch to the board layout, the new ground doesn’t show up.
I need to make a ground path under the mlf32 chip. What are normally the steps to do this?
JD
jandirks:
I had to add a ground to my schematic. No problem of course, but when I switch to the board layout, the new ground doesn’t show up.
Greetings jandirks,
What tools are you using? If its EAGLE you need to turn on
the polygon fill (use the “Ratsnest” command). Create and
name a polygon to the same net as a signal (or ground).
Polygon fills take a lot of CPU time so it better to turn off
the fill until you’re ready for DRC. To remove the fill from
a poygon click the polygon’s border using the “Ripup”
command.
Polygons are auto created when you run the CADCAM job.
Comments Welcome!
With the Pulsonix software I use I just incorporate a grounded pad in the footprint. I could add it to the PCB using a template and copper pour, but I prefer it in the footprint.
Leon
bigglez:
What tools are you using? If its EAGLE you need to turn onthe polygon fill (use the “Ratsnest” command). Create and
name a polygon to the same net as a signal (or ground).
Yes, I am using Eagle!
I seem not to be able to find out how to turn on polygon fill using the ‘ratsnest’ comment.
What if I follow this procedure:
With the command ‘polygon gnd’, I start/draw a polygon below the mlf32 chip.
Draw a wire from ground to the polygon I drew.
Would that do it?
Thanks,
JD
jandirks:
I seem not to be able to find out how to turn on polygon fill using the ‘ratsnest’ comment.What if I follow this procedure:
With the command ‘polygon gnd’, I start/draw a polygon below the mlf32 chip.
Draw a wire from ground to the polygon I drew.
Would that do it?
Greetings JD,
Yes, that will do it, but you don’t need to draw the wire. As long
as the new polygon has the same netname as an existing net,
it will work. If you use the text interface in EAGLE:
(1) Type “show gnd” to highlight the existing gnd net
(2) Type “polygon gnd”, then use the mouse to make a rectangle.
(3) Close the rectangle with a left mouse double-click.
(4) Type “ratsnest”
The rectangle should fill automatically.
(5) If not, type “redraw” or F2.
Comments Welcome!
Thanks again!
I followed your steps, but the ratsnest command says: Nothing to do
What could be wrong?
Edit: I drew the polygon right under the mlf32, close to the ground pins.
jandirks:
I followed your steps, but the ratsnest command says: Nothing to doWhat could be wrong?
Edit: I drew the polygon right under the mlf32, close to the ground pins.
JD,
As I’m not there looking over your shoulder, I suggest that you
save and close your project and start a new one just for a test.
Place one or two parts in a schematic. Add a GND and VCC net.
Make a board from the schematic and try again with creating a
polygon and filling it in.
I’ve had to do this myself a couple of times to understand the
odd UI of EAGLE.
Once you have done that you can try again in your project.
Comments Welcome!
just a guess but if the poly doesn’t actually connect to any part of the ground circuit, orphan control (iirc, it is on by default) will remove it. Try making your gnd polygon completely surround your PCB and then hit ratsnest. That should do it. You should see an airwire to the poly. Also, make sure you are drawing on the correct layer.
Make sure that the name for all of the ground signals are the same for both the schematic and the ground poly in the PCB. What I mean here is if the chip calls ground Vss and you are using the Vss schematic symbol from the Supply libraries, then make sure to name the ground poly Vss in the PCB. I make a habit to use the GND supply symbol exclusively for this very reason, regardless of what the chip manufacturer call ground.
This goes for any time you are using a polygon to connect signals, regardless of the signal. If you are using the 5v symbol in the schematic, don’t name the poly Vcc.
Unfortunately, there is no standard for power supply pin naming, so get in the habit of creating your own. I call all of my +voltage signals ‘Vcc’ and ground signals ‘GND’, unless a component uses a different voltage or requires an analog ground, in which case I make it very clear which signal is which.
MarkS:
Make sure that the name for all of the ground signals are the same for both the schematic and the ground poly in the PCB. What I mean here is if the chip calls ground Vss and you are using the Vss schematic symbol from the Supply libraries, then make sure to name the ground poly Vss in the PCB. I make a habit to use the GND supply symbol exclusively for this very reason, regardless of what the chip manufacturer call ground.This goes for any time you are using a polygon to connect signals, regardless of the signal. If you are using the 5v symbol in the schematic, don’t name the poly Vcc.
Unfortunately, there is no standard for power supply pin naming, so get in the habit of creating your own. I call all of my +voltage signals ‘Vcc’ and ground signals ‘GND’, unless a component uses a different voltage or requires an analog ground, in which case I make it very clear which signal is which.
good points all around. the power and ground naming lack of standards is really annoying. Microchip uses Vss for ground which once caused me to build a nasty little short into a PCB. OK, I cause me to build in the short but I still think the naming is confusing.
Philba:
OK, I cause me to build in the short but I still think the naming is confusing.
It is confusing. They could all at least agree on the name for ground. GND, AGND and DGND are very descriptive and not at all confusing. What the hell is a Vss? Why not just call it what it is? What’s next? Calling processor address pins “Bus System Control Outputs”?
MarkS:
Philba:
OK, I cause me to build in the short but I still think the naming is confusing.It is confusing. They could all at least agree on the name for ground. GND, AGND and DGND are very descriptive and not at all confusing. What the hell is a Vss? Why not just call it what it is? What’s next? Calling processor address pins “Bus System Control Outputs”?
Greetings Marks et al.,
I take a different view. I think the currently used names
are descriptive. In the analog world there may be several
rails (planes, busses) for power and ground and many
analog circuits work without a specific ground connection.
To force the chip designer to call one or more pins ‘ground’
creates the opposite problem (to the one cited here) when
that pin is deliberately connected to a non-ground voltage
in an application circuit.
It doesn’t take much effort to read the IC data sheet to learn
which pins are supplies, and whether one or more should
be connected to ground in a specific application.
Vcc, Vdd, Vee, and Vss, have specific meaning depending
up on the fabrication of the silicon.
Comments Welcome!
bigglez:
Vcc, Vdd, Vee, and Vss, have specific meaning dependingup on the fabrication of the silicon.
But the meaning is often buried deep in the data sheet, many times written in such a techno-geek fashion that makes even seasoned engineers stumble. Pity us poor hobbyists. There has got to be a better way. This is NOT hard stuff, but it is intentionally made to seem that it is.
bigglez:
Vcc, Vdd, Vee, and Vss, have specific meaning dependingup on the fabrication of the silicon.
Comments Welcome!
why does that dictate the naming of the pins? I’ll pick on Vss in Microchip digital products. It’s 0V, just like gnd from almost every other company. why not call it gnd?? So where did Vss come from? It’s the source voltage in CMOS. Assuming the sources of the cmosfet devices in the chip are all tied to Vss - yeah, I know they all aren’t. Now that’s clear as mud for some one using CMOS chips. I think most chip manufacturers agree and they chose gnd for that voltage level.
While I’m at it, Vdd - drain voltage, Vcc - collector voltage, Vee - emitter voltage (though often used for the negative output of a bipolar supply). It’s funny to see cmos parts with Vcc for positive voltage pin names.
So from a historical perspective - Vdd and Vcc are sort of equivalent as are Vss and Vee. But history sucks if it means confusing people. Consistency is much preferable.
Philba:
why does that dictate the naming of the pins? I’ll pick on Vss in Microchip digital products. It’s 0V, just like gnd from almost every other company. why not call it gnd?? So where did Vss come from? It’s the source voltage in CMOS.
I’m pretty sure the labels are a relic of the time when NMOS logic was the dominant technology before PMOS and CMOS became available.
With NMOS, your source (Vss) is connected to GND and your drain (Vdd) is connected to your positive supply.
-Bill
yes, I believe you are correct.
bigglez:
(1) Type “show gnd” to highlight the existing gnd net(2) Type “polygon gnd”, then use the mouse to make a rectangle.
(3) Close the rectangle with a left mouse double-click.
(4) Type “ratsnest”
The rectangle should fill automatically.
(5) If not, type “redraw” or F2.
Comments Welcome!
Ok, I have followed the procedure as descibed in the quote. The only difference between my previous try and the last one is that I followed Philba’s advice and drew a poly completely around my design. After hitting ‘ratsnest’, my board nicely filled up.
When saving the board and reopening it, the fill is completely removed. The outline is still there (like after drawing the poly), but the fill (like what you see when you hit ‘ratsnest’) is gone. Also, I submitted the board to BatchPCB and the designed passed the bot, but there was no difference to see between my first submitted design from a few weeks ago (with no ground pad for under the mlf32) and the changed design.
Should I see a difference? I think I should…
I can still use my old boards, there is a via under the mlf32 chip where I can slide through a very thin wire. It makes contact with the bottom-ground-pad of the mlf-32 if I solder it to the board, but it is not the solution I am looking for.
This must be possible, right?
jandirks:
When saving the board and reopening it, the fill is completely removed. The outline is still there (like after drawing the poly), but the fill (like what you see when you hit ‘ratsnest’) is gone. Also, I submitted the board to BatchPCB and the designed passed the bot, but there was no difference to see between my first submitted design from a few weeks ago (with no ground pad for under the mlf32) and the changed design.Should I see a difference? I think I should…
Greetings JD,
What are you viewing to make this claim? The composite
PNG images from BatchPCBshould be good enough to see
the newly added poly fill (ground plane). Many people also
use a third party Gerber viewer to see the actual files.
bigglez:
Polygon fills take a lot of CPU time so it better to turn offthe fill until you’re ready for DRC. To remove the fill from
a poygon click the polygon’s border using the “Ripup”
command.
Polygons are auto created when you run the CADCAM job.
So just to make it clear, the poly fills are turned off by
EAGLE when you load a board. You will need to turn
them on (“ratsnest”) to see the fill each time.
However, the fill is automatically done when you run
a CAM job.
jandirks:
This must be possible, right?
Perhaps you can post your SCH and BRD files here?
Comments Welcome!
Is it ok if I mail them to you?
jandirks:
Is it ok if I mail them to you?
JD,
Sure! I’ll try to help you.
Send then to pstonard AT ix DOT netcom DOT com