at91rm9200 + ARM-JTAG-OCD

Development Boards MicroMod
1

Hi,

I’m using a Garz&Fricke devkit, BOB920 with the ECO920 CPU module. Now trying to connect to Olimex ARM-JTAG-OCD.

ECO920 board has a non standard JTAG pod. I made the following physical connection to the Olimex :

ECO920 pod Olimex pod

1 NC

3 GND 4 GND

5 GND 4 GND

7 NMR (/Master-Reset)

9 VDD3_3 1,2 VREF

11 GND 4 GND

2 NTRST 3 TTRST_N

4 TCK 9 TTCK

6 TMS 7 TTMS

8 TDI 5 TTDI

10 TDO 13 TTDO

12 JTAGSEL

11 TRTCK

15 TSRST_N

Not sure what to do with the NMR and the JTAGSEL on the ECO board, or the TRTCK, TSRST_N on the Olimex. I guess the TRTCK is the return clock from the target to the Olimex, which is not really required, but for the resets?

When using Olimex ARM-JTAG-OCD with a AT91RM9200, would following configuration do? Not sure about the flash settings, but these wouldn’t matter in first instance, I guess. Here again, the config setting wrt the resets is boggling me.

#daemon configuration

telnet_port 4444

gdb_port 3333

#interface

interface ft2232

ft2232_device_desc “Olimex OpenOCD JTAG A”

ft2232_layout “olimex-jtag”

ft2232_vid_pid 0x15BA 0x0003

jtag_speed 0

jtag_nsrst_delay 200

jtag_ntrst_delay 200

#use combined on interfaces or targets that can’t set TRST/SRST separately

reset_config trst_and_srst

#jtag scan chain

#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)

jtag_device 4 0x1 0xf 0xe

#target configuration

daemon_startup reset

#target

target arm9tdmi little reset_halt 0 arm920t

working_area 0 0x200000 0x4000 backup

run_and_halt_time 0 5000

#flash configuration

#flash bank <chip_width> <bus_width> [driver_options …]

flash bank cfi 0x10000000 0x800000 2 2 0

2

TABs don’t show up properly…

So here again the physical connection :

ECO920 pod ------------ Olimex pod

1 NC --------------------- NC

3 GND -------------------- 4 GND

5 GND -------------------- 4 GND

7 NMR (/Master-Reset) - NC

9 VDD3_3 --------------- 1,2 VREF

11 GND ------------------ 4 GND

2 NTRST ----------------- 3 TTRST_N

4 TCK -------------------- 9 TTCK

6 TMS -------------------- 7 TTMS

8 TDI --------------------- 5 TTDI

10 TDO ------------------- 13 TTDO

12 JTAGSEL -------------- NC

NC ------------------------- 11 TRTCK

NC ------------------------- 15 TSRST_N

3

Hi,

on a AT91RM9200, JTAGSEL has to be pulled low to enable debugging, otherwise the JTAG port is used for boundary scanning. You’ll have to consult your board documentation whether this is already done on your board, maybe by placing a jumper.

I guess that NMR should be connected to TSRST_N, but only if this line doesn’t assert nTRST, too.

TRTCK, the return clock, isn’t necessary on a non -S core like the ARM9TDMI.

Your reset configuration looks good, but you might want to increase the jtag_n[st]rst_delay settings.

Make sure you’re using a current version of the OpenOCD (you can get precompiled windows binaries from www.yagarto.de).

Regards,

Dominic

4

Thanks Dominic,

it looks like this will work for me.

rgds,