ConfigurePLL throws

Development Boards MicroMod
1

I’m trying to run a minimal project.

After this row:

PLLFEED = 0xaa;

0x00000268 <ConfigurePLL+72>: lsls r0, r1, #0

0x0000026c <ConfigurePLL+76>: movs r0, #128

LPC2378 automatically goes to Undef_Addr vector

{

0x00000220 : adds r1, #0

if ( PLLSTAT & (1 << 25) )

0x00000222 <ConfigurePLL+2>: lsls r0, r4, #4

0x00000224 <ConfigurePLL+4>: ands r0, r0

0x00000226 <ConfigurePLL+6>: lsls r0, r0, #6

0x00000228 <ConfigurePLL+8>: stmia r5!, {r0, r1, r3}

PLLCON = 1; /* Enable PLL, disconnected */

0x0000022a <ConfigurePLL+10>: asrs r0, r0

0x0000022c <ConfigurePLL+12>: lsls r0, r0, #0

0x0000022e <ConfigurePLL+14>: lsls r0, r0, #0

PLLFEED = 0xaa;

0x00000230 <ConfigurePLL+16>: lsrs r0, r0, #8

0x00000232 <ConfigurePLL+18>: movs r1, #2

0x00000234 <ConfigurePLL+20>: lsls r0, r0, #0

PLLFEED = 0x55;

0x00000236 <ConfigurePLL+22>: lsls r1, r0, #4

0x00000238 <ConfigurePLL+24>: lsls r1, r0, #0

PLLCON = 0; /* Disable PLL, disconnected */

0x0000023a <ConfigurePLL+26>: lsls r0, r4, #4

0x0000023c <ConfigurePLL+28>: lsls r0, r0, #8

0x0000023e <ConfigurePLL+30>: lsls r0, r0, #0

PLLFEED = 0xaa;

0x00000240 <ConfigurePLL+32>: lsls r0, r4, #0

0x00000242 <ConfigurePLL+34>: movs r0, #168

0x00000244 <ConfigurePLL+36>: movs r0, #16

PLLFEED = 0x55;

0x00000246 <ConfigurePLL+38>: add r1, pc, #84 (adr r1, 0x29c <ConfigurePLL+124>)

0x00000248 <ConfigurePLL+40>: movs r0, #0

SCS |= 0x20; /* Enable main OSC */

0x0000024a <ConfigurePLL+42>: asrs r2, r0

0x0000024c <ConfigurePLL+44>: lsls r2, r0, #0

0x0000024e <ConfigurePLL+46>: movs r2, #0

0x00000250 <ConfigurePLL+48>: lsls r1, r0, #0

0x00000252 <ConfigurePLL+50>: lsls r0, r0, #0

while( !(SCS & 0x40) ); /* Wait until main OSC is usable */

0x00000254 <ConfigurePLL+52>: movs r0, #0

0x00000256 <ConfigurePLL+54>: str r0, [r0, #0]

0x00000258 <ConfigurePLL+56>: lsls r0, r0, #0

0x0000025a <ConfigurePLL+58>: stmia r0!, {r7}

CLKSRCSEL = 0x1; /* select main OSC, 12MHz, as the PLL clock source */

0x0000025c <ConfigurePLL+60>: lsls r1, r1, #0

0x0000025e <ConfigurePLL+62>: movs r0, #1

0x00000260 <ConfigurePLL+64>: movs r0, #12

PLLCFG = PLL_MValue | (PLL_NValue << 16);

0x00000262 <ConfigurePLL+66>: movs r4, #2

0x00000264 <ConfigurePLL+68>: adds r0, #0

0x00000266 <ConfigurePLL+70>: str r0, [r0, #0]

PLLFEED = 0xaa;

0x00000268 <ConfigurePLL+72>: lsls r0, r1, #0

0x0000026c <ConfigurePLL+76>: movs r0, #128

2

[EDIT -Oops - I just noticed that your using a 23xx and not a 21xx processor. The following may require changes to apply to you as I’m working with LPC21xx chips at this time. ]

You should disable interrupts - or at least PLLCON interrupt in the VIC- befopre configuring the PLL.

Next, you appear to be trying to connect the PLL to the processor, but you haven’t configured the PLLCFG register for the appropriate multiplier and divisor for the appropriate frequency scaling, based on the oscillator frequency you are using.

It is also imperative that NOTHING interrupt the 2 feed WRITE operations to the PLLFEED register - if any interrupt occurs between those 2 WRITEs an exception will occur - best to disable interrupts when doing a PLLFEED.

I write a PLL_Feed() routine which gets the current interrupt state, disables all interrupts, performs the (2) writes, and then restores the previous interrupt state again. This way I can use it from any place that I need to.

You also have to WAIT for PLLSTAT locked bit (0x01 <<10) to be 1 before you connect the PLL to the processor, or else you may be connecting the clock source to the CPU before the clock source has synchronized itself.

I recommend doing something like the following sequence:

disable_ints();

PLLCON = 0x00000000;

VICIntEnClear = (0x01<<12); // clear VIC interrupt enable just in case

PLLCFG = (unsigned long ((0x01<<5)|(0x03)); set divisor&multiplier as appropriate for your osc

PLL_Feed();

PLLCON = 0x01; // Enable PLL

PLL_Feed();

// wait for PLL locked status

while(! ((volatile)PLLSTAT & (0x01<<10)) )

{

;

}

//PLL should now be locked, try to connect to it as clk source

PLLCON = (unsigned long) 0x03;

PLL_Feed();

// Check for PLL being enabled, locked, and connected

if ((PLLSTAT & (0x07<<8 ) == (0x07<<8 ))

{

// PLL is operating, now go ahead and configure MAM and PCLK as needed

}

else

{

PLLCON = (unsigned long) 0x00; Disable PLL if it didn’t connect, etc.

PLL_Feed();

}

enable_ints();

3

The assembly code looks like nonsense. It looks like you relocated your code to run out of flash but never actually flashed the device.