Davinci jtag + 14 pin TI connector

I’m using the ARM-USB-TINY-H to control a Davinci 6441 through the use of an adapter board (ASSY #508520-0001) that does the level converting to the 1.8V davinci IO.

Here is my openocd cfg file:

interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x002a
reset_config trst_only trst_push_pull
jtag_khz 500
telnet_port 4444
gdb_port 3333
tcl_port 6666
set JRC_TAPID 0x1b70002f
source [find target/davinci.cfg]
source [find target/ti_dm6446.cfg]

It works reliably to view a number of devices in the scan chain, but I can’t reliably halt the arm cpu or view is memory, do writes, etc.:

> scan_chain
   TapName             Enabled  IdCode     Expected   IrLen IrCap IrMask
-- ------------------- -------- ---------- ---------- ----- ----- ------
 0 dm6446.unknown         n     0x00000000 0x00000000     8 0x01  0x03
 1 dm6446.dsp             n     0x00000000 0x00000000    38 0x25  0x3f
 2 dm6446.etb             Y     0x00000000 0x2b900f0f     4 0x01  0x0f
 3 dm6446.arm             Y     0x00000000 0x07926001     4 0x01  0x0f
 4 dm6446.jrc             Y     0x1b70002f 0x1b70002f     6 0x01  0x3f
> halt
Halt timed out, wake up GDB.
timed out while waiting for target halted
Command handler execution failed
in procedure 'halt' called at file "command.c", line 637
called at file "command.c", line 352

The header pinouts are as follows:

1 TMS

2 TRST-

3 TDI

4 GND

5 PD

6 no pin (key)

7 TDO

8 GND

9 TCK-RET

10 GND

11 TCK

12 GND

13 EMU0

14 EMU1

It’s a 2x7 1/10th inch spacing header, all the even pins on one side, odd on the other.

There is no SRST line (system reset). The davinci docs say in order to get jtag working reliably you need to hold TRST low while bringing system reset from low to high. But openOCD doesn’t have direct control of the SRST line in this case.

I think the problem is that openOCD doesn’t know how to replicate the missing SRST behaviour. One time just messing with the board I managed to get it into a state where I could halt the ARM cpu and read / set its registers, but I could only get 0xffffffff back from attempts to read its memory space. I’ve not been able to duplicate that.

OpenOCD uses ICEPICK enough to be able to activate + detect the various devices on the jtag chain. But I think the implementations supported by openocd config files were set up for jtag links that include the SRST line.

Does anyone have any insight as to how I can solve this problem? Or even if it sounds like I’m on the right track?

Thanks!

dash:
Does anyone have any insight as to how I can solve this problem? Or even if it sounds like I’m on the right track?

Boy what a complete waste of time this turned out to be. Wait 4 days for some administer to OK the post, then get absolutely no responses of any kind.

Thanks for nothing.