Hi Guys,
In the last days I was struggling to work with OpenOCD 0.1.0 and some ARM chips (LPC2368 and Luminary CortexM3).
1- While working with both parts, I found that the event “gdb-attach” is called twice everytime I start the GDB debugger. In the config file I used a routine to flash the device everytime the GDB connects, so the part is flashed twice.
2- On the LPC2368, OpenOCD thinks the chip has 26 sectors of flash, when it has actually 27 (at 0x0007D000)… I had a bootloader routine in the last sector and I pulled all my hair until I found that OpenOCD failed to write the last sector.
3- Is there a way to make OpenOCD flash only the data I need (in a hex file)? I have a small program at the start of the flash linked with a bootloader in the upper flash. OpenOCD always write the entire array even if it´s scattered. Or at least, skip unused areas (filled with 0xFF)?
4-When I flash my program with the bootloader in the upper flash, the program flash was corrupted. If I change the linker cmd file to load the bootloader just after the normal code, the image writes ok.
I tried "flash write_bank, flash write_image with .hex , .elf and .bin and got the same results.
5-commands: gdb_flash_program, gdb_memory_map returns an error:
gdb_flash_program enable
Illegal mode for command
Runtime error, file “command.c”, line 456:
For the record, I am using an FT2232 interface, the LM3S811 EVB from luminary, with SRST only
The config files I used:
ftdi interface
interface ft2232
ft2232_device_desc “LM3S811 Evaluation Board A”
ft2232_layout evb_lm3s811
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc2368
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
force an error till we get a good number
set _CPUTAPID 0x4F1F0F0F
}
#delays on reset lines
jtag_nsrst_delay 200
jtag_ntrst_delay 200
jtag_khz 1000
gdb_port 2331
NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
JTAG, power-on reset is not enough, i.e. you need to perform a
reset before being able to talk to the LPC2148, attach is not
possible.
#use combined on interfaces or targets that can’t set TRST/SRST separately
reset_config srst_only
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME [format “%s.cpu” $_CHIPNAME]
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40001000 -work-area-size 0x4000 -work-area-backup 0
$_TARGETNAME configure -event reset-init {
Force target into ARM state
#soft_reset_halt
reset halt
#do not remap 0x0000-0x0020 to anything but the flash
mwb 0xE01FC040 0x01
}
$_TARGETNAME configure -event gdb-attach {
soft_reset_halt
#reset halt
mwb 0xE01FC040 0x01
flash probe 0
flash erase_sector 0 0 26
flash write_image PhoneTerminal.hex 0 ihex
#soft_reset_halt
sleep 1000
}
#flash bank lpc2000 0 0 <target#>
flash bank lpc2000 0x0 0x80000 0 0 0 lpc2000_v2 10000 calc_checksum
and the linker cmd file:
FIQ_STACK_SIZE = 0x0;
IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0;
UND_STACK_SIZE = 0x0;
SVC_STACK_SIZE = 0x0400;
IAP_RAM_USAGE = 32;
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x7C000
BOOTLOADER (rx) : ORIGIN = 0x0007C000, LENGTH = 0x01000 /* my bootloader routine , sector 26 of flash */
RESERVED (rx) : ORIGIN = 0x0007E000, LENGTH = 0x02000 /* the last 8kb (0x2000) is the lpc2368 reserved boot block */
RESERVED_IAP_RAM (rwx) : ORIGIN = 0x40000000 , LENGTH = 0x000000200 /* reserved for vectors in ram + iap + etc */
BOOTLOADER_RAM (rwx) : ORIGIN = 0x40000200 , LENGTH = 0x20 /* p/comunicacao entre o bootloader a o progrmaa em si… legacy */
RAM (rwx) : ORIGIN = 0x40000220 , LENGTH = 0x7DC0 /* (0x8000 - IAP_RAM_USAGE - 0x220) */
USBRAM (rw) : ORIGIN = 0x7FD00000 , LENGTH = 0x2000
ETHRAM (rw) : ORIGIN = 0x7FE00000 , LENGTH = 0x4000
}
heap_end = 0x40008000 - IAP_RAM_USAGE;
SECTIONS
{
. = 0;
.text :
{
*(.vectors);
. = ALIGN(4);
*(.text);
. = ALIGN(4);
*(.rodata);
. = ALIGN(4);
(.rodata);
. = ALIGN(4);
*(.glue_7);
. = ALIGN(4);
*(.glue_7t);
. = ALIGN(4);
_etext = .;
} > FLASH
.data : AT (_etext)
{
data_start = .;
data_start_flash = _etext;
*(vtable)
(.data)
. = ALIGN(4);
data_end = .;
} > RAM
.bootloader :
{
(.bootloader)
} > BOOTLOADER
.bss :
{
bss_start = .;
*(.bss)
*(COMMON)
. = ALIGN(4);
bss_end = .;
. = ALIGN(4);
PROVIDE (stack_start = .);
PROVIDE (stack_fiq_start = .);
. += FIQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (stack_fiq_end = .);
PROVIDE (stack_irq_start = .);
. += IRQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (stack_irq_end = .);
PROVIDE (stack_abt_start = .);
. += ABT_STACK_SIZE;
. = ALIGN(4);
PROVIDE (stack_abt_end = .);
PROVIDE (stack_und_start = .);
. += UND_STACK_SIZE;
. = ALIGN(4);
PROVIDE (stack_und_end = .);
PROVIDE (stack_svc_start = .);
. += SVC_STACK_SIZE;
. = ALIGN(4);
PROVIDE (stack_svc_end = .);
PROVIDE (stack_end = .);
heap_start = .;
} > RAM
.USBRAM (NOLOAD):
{
usbram_start = .;
*(.dmaram)
usbram_end = .;
} >USBRAM
.ETHRAM (NOLOAD):
{
ethram_start = .;
*(.ethram)
ethram_end = .;
} >ETHRAM
}
Thanks for any help!!!
Sergio P. Sider