First Project Design Check

This is my first project and wanted to make sure everything looks right before sending it off to the fab house, if that’s what I end up doing. It passed the Bot check on BatchPCB, but it looks like its going to be $79.00 to make it. :confused: Not sure if there’s much I can do about size, its suppose to be a strobe light to go in a vehicle windshield, so it really needs to be spread out.

http://i56.tinypic.com/dy6qhd.png

http://i51.tinypic.com/2094s53.png

http://i55.tinypic.com/2my51fb.png

http://i55.tinypic.com/anhtuw.png

http://i52.tinypic.com/168adqv.png

http://i53.tinypic.com/nwg6yu.png

What’s the area of the board? I found that BatchPCB is best for smaller boards, but for bigger boards you can do just as good or better with a different service.

I think some of your traces could be bigger, and maybe you should move your switch to be between the power jack and the regulator.

Width: 16

Height: 1.85

Any other services you can recommend?

A few notes about the design:

Schematic:

  • The 7805 needs ceramic caps (100n to 330n) to prevent oscillations - one input to gnd, one output to gnd

  • Schematic doesn’t show the connections (either by named net or wire) between the LED cathodes and the FETs

  • Try to avoid 4-way connections (like the one at the regulator’s ground pin) in a schematic; two 3-way connections are clearer, and makes it easier to spot accidental connections

  • Missing pullup (4k75 - 10k ohms) on reset

PCB

  • I would use wider traces for power, ground, and the “drain” lines

  • Place the 100n bypass caps right next to the processor, one at each power pin

  • Don’t run any traces topside under the tab of the voltage regulator; the back of it is metal and grounded

  • You may need a heatsink on the regulator (13.6 - 5 * 0.2A) = 1.7w. At least, put a copper pour there to help dump the heat.

  • Pin 1 on the ICSP header should be labeled MISO in the silk

  • It’s hard to tell on the picture, but traces should leave pins at 90 degrees, and should bend with two 45 degree bends rather than one 90. Acute angles can form acid traps that can undercut the traces. Look at the third resistor from the left for an odd connection; there’s also something odd on the top terminal of the third LED from the left.

  • It may be OK on the board, but the two traces (from the input connector to 100u cap and from the 10u cap to the ICSP header +5 pin) look a bit close where they bend. Likewise, the traces from the FET drains to the LEDs look like they are running through other pins on the FETs

  • There are other places where the clearance looks a bit tight; posting a PDF or Gerbers would make it easier to check

As for pricing, I’d either go with Gold Phoenix ($110 would give you 5 boards) or see what PCBCart would cost (their web site is acting up right now…) Another option would be to split the design in two (one board for the LEDs and resistors; use two for the full design; and one board for the processor and driver) and use DorkbotPDX

/mike

n1ist:
A few notes about the design:

Schematic:

  • The 7805 needs ceramic caps (100n to 330n) to prevent oscillations - one input to gnd, one output to gnd

  • Schematic doesn’t show the connections (either by named net or wire) between the LED cathodes and the FETs

  • Try to avoid 4-way connections (like the one at the regulator’s ground pin) in a schematic; two 3-way connections are clearer, and makes it easier to spot accidental connections

  • Missing pullup (4k75 - 10k ohms) on reset

PCB

  • I would use wider traces for power, ground, and the “drain” lines

  • Place the 100n bypass caps right next to the processor, one at each power pin

  • Don’t run any traces topside under the tab of the voltage regulator; the back of it is metal and grounded

  • You may need a heatsink on the regulator (13.6 - 5 * 0.2A) = 1.7w. At least, put a copper pour there to help dump the heat.

  • Pin 1 on the ICSP header should be labeled MISO in the silk

  • It’s hard to tell on the picture, but traces should leave pins at 90 degrees, and should bend with two 45 degree bends rather than one 90. Acute angles can form acid traps that can undercut the traces. Look at the third resistor from the left for an odd connection; there’s also something odd on the top terminal of the third LED from the left.

  • It may be OK on the board, but the two traces (from the input connector to 100u cap and from the 10u cap to the ICSP header +5 pin) look a bit close where they bend. Likewise, the traces from the FET drains to the LEDs look like they are running through other pins on the FETs

  • There are other places where the clearance looks a bit tight; posting a PDF or Gerbers would make it easier to check

As for pricing, I’d either go with Gold Phoenix ($110 would give you 5 boards) or see what PCBCart would cost (their web site is acting up right now…) Another option would be to split the design in two (one board for the LEDs and resistors; use two for the full design; and one board for the processor and driver) and use DorkbotPDX

/mike

I have two 0.1uF caps on the processor already don’t I? Or are they not right?

For the reset, I thought the atmega328 had an internal pullup resistor?

How does it looks now? I pm’ed you the gerber.

http://i56.tinypic.com/2ijnti8.png

Where did you see that pricing on Gold Phoenix? Also, I noticed they want a Bill of Materials. Do they put the parts on the pcb, or how does that work?

I found the price for Gold Phoenix [here

Decoupling caps should be right next to the supply pin they are decoupling, so I would put one next to pin 4 and one next to pin 18 within a 200-300 mils or so. AVR Apps note [AVR042 discusses this and also mentions the 4k7 (10k if you plan to use debugwire) reset pullup resistor for better noise immunity.

Since the board is rather large and spacious, I would not run leads so close to through hole pins (the FETs, the ISP connector). It is too easy to accidentally short them when soldering.

Power and grounding needs to be wider, and should split into two paths - one for the micro, and one for the FETs, meeting at the regulator. The wider traces to the micro reduces impedance and running them separately from the high current traces to the LEDs will reduce ground bounce and brownouts to the micro. Right now, there are key segments of these nets that are still thin - the source traces of the FETs, the ground to the regulator and filter caps, and the power and ground traces to the micro.

For the traces feeding the LEDs, it would be neater to run two horizontal traces and have stubs T’ing off them for each LED. That wouldn’t be a great way to route a signal but is OK for power.

Here’s a quick version I tossed together (I did it in KiCAD since I’m not an Eagle person)

/mike](http://www.atmel.com/dyn/resources/prod_documents/doc2521.pdf)](http://www.goldphoenixpcb.com/singlepage.php?tg=specialprice)

Do you have the files you created? The text in those images is difficult to read, that way I can just download KiCad and view it there.

Thanks

The KICad archive can be found [here.

/mike](http://www.ardai.net/ISTDesignLabs/Lightbar.zip)