PCB Design Review

Community PCB Design
1

Hello Everyone.

I’d like a review of my PCB layout. This is my first try at laying out a PCB, and I would appreciate any feedback (good or bad). In other words… let me have it! :smiley:

I’ve been working on the schematic for a few months with the help of the great people on this forum. Here’s a link to the schematic review if you are interested. https://forum.sparkfun.com/viewtopic.php?f=20&t=32862

I’ve attached the following images:

  1. Schematic

  2. PCB with all main layers showing

  3. PCB with only top copper/pads/vias showing

  4. PCB with only bottom copper/pads/vias showing

  5. PCB with only top & bottom copper/pads/vias showing.

I’ve also attached the Eagle files incase you’d like to look at those.

Please let me know what you think.

Thanks! :smiley:

EDIT: Looks like image attachments don’t work on this forum. You can view them at the following links.

http://img442.imageshack.us/img442/3678 … ticv11.png

http://img713.imageshack.us/img713/9806/pcball.png

http://img37.imageshack.us/img37/3333/pcbtop.png

http://img411.imageshack.us/img411/5426/pcbbottom.png

http://img824.imageshack.us/img824/599/pcbtb.png

http://img442.imageshack.us/img442/3678 … ticv11.png

http://img713.imageshack.us/img713/9806/pcball.png

http://img37.imageshack.us/img37/3333/pcbtop.png

http://img411.imageshack.us/img411/5426/pcbbottom.png

http://img824.imageshack.us/img824/599/pcbtb.png

2

Here are the Eagle CAD files…

SerialToEthernetGateway-v11.zip

http://www31.zippyshare.com/v/25534984/file.html

3

A few notes:

Schematic:

  • Avoid 4-way junctions (like the ground pin on U1). They can make it harder to find accidental connections where wires cross and make the schematic clearer.

  • I prefer having the fuse first

  • I would add a ground pin to JP2

  • I would label JP3 as ISP

  • To reduce clutter, I would add a note saying that all caps are ceramic unless otherwise noted, and just lable the type on the tantalums and electrolytics. Also, I usually don’t bother showing capacitor working voltages in the schematic unless they are unusual or there are caps of different voltages but the same capacitance.

PCB:

  • Traces connecting the charge pump caps to the serial level shifter should enter the pads from the end, not the side. There’s not enough clearance between traces and pads this way

  • Bypass caps need to be very close to the Vcc pin(s) of the parts they are feeding. Ideally, the Vcc trace should hit the cap first, and then the pin. I would move C11 closer to U6 and C14 closer to the Vcc pin on U3. I would also add another 100n bypass cap by U3p7. Likewise, the bypass caps on the linear regulator

  • Something is very messed up around the 3.3v switcher. There are pours with rough edges, and the edges short in spots

  • Will the screw in the lower left mounting hole interefere with the Wiznet module?

  • Both ground pours are quite swiss-cheesed. For example, look at the ground return path from the serial level shifter to the lower left cap. Moving the backside trace to the other side of the via under the chip would fix this. One key here is to look at the paths from the chip, bypass cap, and regulator, on both the power and ground side.

/mike

4

You make some very good points. I’ll admit that I didn’t follow all of the schematic suggestions on this project, but I will in the future. Please check out my updated PCB and let me know what you think.

As for your questions… The screw doesn’t get in the way of the Wiznet module since the module is elevated with female headers. For the switching regulator weirdness, the dotted lines are cutouts from the planes. I’m not sure why they are shown like that, but I can see whey they look shorted. If I look in the Eagle files, it looks correct as well as with a gerber viewer.

Thank for the help! :smiley:

Eagle Files: SerialToEthernetGateway-v11-2.zip

http://www37.zippyshare.com/v/22516437/file.html

http://img856.imageshack.us/img856/2812 … icv112.png

http://img31.imageshack.us/img31/8625/pcball2.png

http://img842.imageshack.us/img842/2248/pcbtop2.png

http://img600.imageshack.us/img600/871/pcbbottom2.png

http://img651.imageshack.us/img651/8270/pcbtb2.png

http://img856.imageshack.us/img856/2812 … icv112.png

http://img31.imageshack.us/img31/8625/pcball2.png

http://img842.imageshack.us/img842/2248/pcbtop2.png

http://img600.imageshack.us/img600/871/pcbbottom2.png

http://img651.imageshack.us/img651/8270/pcbtb2.png

5

I suggest using a bussed resistor like [this. for R4-R7 Less amount of parts, and a bit bigger part so it is harder to loose.

I am wondering why the traces leading away from C1 C2 are not as big as those leading in.

Could you move to a QTP package for the 328? Save you some room.

You are giving your v-reg LOTS of room there. Consitering you can only source 250mA. Also the traces are massive for the power in. You can bump them down to like 15 or so mils.

You can really bunch the chips in alot to save on space and money. Think like an Apple engineer.](EXB-38V103JV Panasonic Electronic Components | Resistors | DigiKey)

6

I did think about doing that, but I never did. I think I had already ordered some parts and didn’t want to change stuff out. Plus, I already had 100 of the 10k resistors.

Other than that, though, do you think my routing is good?

Thanks for the help!

7

Ok. Sorry for the late edit. Don’t worry. I swear I have at least 1,000 sitting on my table here. I would work on condensing the board layout much more. I found the routing great. Hand route?

EDIT: Is U6 a EEPROM?

8

C2 has a 24mil trace going in and out, but C1 has a 40mil trace coming in from the source and a 24mil trace going out to the regulator. The reason that C1 only has a 24mil trace going out was because of the vias. There wasn’t enough clearance. I should have probably moved the vias or just used 24mil for the incoming trace. I wasn’t sure what sizes to use for the traces as this is my first time with this, but I read that I should use as large as I could. I also heard that It was good to use different sizes, so that visually you could figure out what voltages are where. My thinking was that the large 40mil trace is clearly Vin and the 24mil traces are regulated output voltages. All of the other traces are 16mil signal traces. Do you think that I should change the trace sizes given my original thoughts? I’m not sure if the trace coming out of C1 being smaller is ok or not. Maybe that should change?

What are some typical traces sizes that you use? I could have probably used all 10mil traces… :? :smiley:

There are a couple of reasons that I didn’t use a QFP on this project… I chose to keep the DIP as I could socket it just in case I did something stupid. The other reason is that I’m not sure if I would be able to hand solder a QFP. I don’t have a reflow oven (yet :shifty:). What do you think about hand soldering a QFP?

I noticed that during breadboard testing, my TO-220 vreg got quite hot at 12V input. I went though and did the calculation and determined that the square of copper I have would keep the surface mount part sufficiently cool. I’ll agree that it’s probably still a little overkill on the size of the square though. Now, the other thing that I struggled with a little was the choice of the enclosure. I wanted the three ports to be on the same side of the case because of where this would be placed when completed, so that narrowed down the enclosures that I had to choose from. Then there was the four mounting screw positions that I had to account for. After I figured all of that out, I figured that I was going to pay for at least the size of PCB shown, so I didn’t really need to make it any smaller. So, I decided to keep it more spread out. This would also be the reason that I kept my overkill vreg cooling square. I hope that makes sense! 8)

If the front ports weren’t so big, and I used a QFP and had chips on both sides of the board, I’m thinking that you are right in that I would get this down to a really small size. :think: But, that’s a project for another day.

I did hand route this. No auto routing was involved. I figured it would be a great leaning experience, and it was. I have to say that routing is almost like an art. It can be very tricky at times. Thanks for the complement!

U6 is an EEPROM that contains a unique MAC address preloaded from Microchip. I figured that I would throw that in just for completeness. I do have one question about that. Since this is just an EEPROM chip, should it have a filter cap on it’s input? I probably won’t add one since it works find on the breadboard and there is a cap already nearby, but I was just wondering. What’s the standard practice?

Thanks again! :smiley:

9

steve1515:
C2 has a 24mil trace going in and out, but C1 has a 40mil trace coming in from the source and a 24mil trace going out to the regulator. The reason that C1 only has a 24mil trace going out was because of the vias. There wasn’t enough clearance. I should have probably moved the vias or just used 24mil for the incoming trace. I wasn’t sure what sizes to use for the traces as this is my first time with this, but I read that I should use as large as I could. I also heard that It was good to use different sizes, so that visually you could figure out what voltages are where. My thinking was that the large 40mil trace is clearly Vin and the 24mil traces are regulated output voltages. All of the other traces are 16mil signal traces. Do you think that I should change the trace sizes given my original thoughts? I’m not sure if the trace coming out of C1 being smaller is ok or not. Maybe that should change?

What are some typical traces sizes that you use? I could have probably used all 10mil traces… :? :smiley:

For 250 mA, actually the formula I use comes out to ~11 mils so I would have bumped it up to 12 mils. Signal I start with 8mils and move up 1 mil for every successful route.

There are a couple of reasons that I didn’t use a QFP on this project… I chose to keep the DIP as I could socket it just in case I did something stupid. The other reason is that I’m not sure if I would be able to hand solder a QFP. I don’t have a reflow oven (yet :shifty:). What do you think about hand soldering a QFP?

If you can solder a 0603 SMD, then you can solder a QFP. Just make sure you have it lined up nicely. A hot air rework station is also very nice in mounting these from board to board. I've had a uC get moved from 5 different boards, and somehow it still works.

I noticed that during breadboard testing, my TO-220 vreg got quite hot at 12V input. I went though and did the calculation and determined that the square of copper I have would keep the surface mount part sufficiently cool. I’ll agree that it’s probably still a little overkill on the size of the square though.

Good enough reason for me.

Now, the other thing that I struggled with a little was the choice of the enclosure. I wanted the three ports to be on the same side of the case because of where this would be placed when completed, so that narrowed down the enclosures that I had to choose from. Then there was the four mounting screw positions that I had to account for. After I figured all of that out, I figured that I was going to pay for at least the size of PCB shown, so I didn’t really need to make it any smaller. So, I decided to keep it more spread out. This would also be the reason that I kept my overkill vreg cooling square. I hope that makes sense! 8)

If the front ports weren’t so big, and I used a QFP and had chips on both sides of the board, I’m thinking that you are right in that I would get this down to a really small size. :think: But, that’s a project for another day.

I suggest only putting parts on one side unless absolutely necessary. But making a super small data logger, now that would probably need both sides populated.

I did hand route this. No auto routing was involved. I figured it would be a great leaning experience, and it was. I have to say that routing is almost like an art. It can be very tricky at times. Thanks for the complement!

U6 is an EEPROM that contains a unique MAC address preloaded from Microchip. I figured that I would throw that in just for completeness. I do have one question about that. Since this is just an EEPROM chip, should it have a filter cap on it’s input? I probably won’t add one since it works find on the breadboard and there is a cap already nearby, but I was just wondering. What’s the standard practice?

Thanks again! :smiley:

Ah yes. Makes sense. I would put a .1uF ceramic cap on it. Usually on Microchip's uCs(which I use constantly) they recommend one .1uF cap per VCC and VDD pair, placed as close as possible on the board to the pins. They are cheap, can come in 0402 or 0603, and you will probably have tons of other of the caps already on the board, so it wouldn't hurt if you put one on there.
10

In general, we use wide traces for power and ground both to minimize voltage drop due to current, but also to reduce inductance. I often use 40 or 50 mil traces for Vcc around the board and then branch off with 15 or 20 mil traces to the bypass cap and then the device pin. The cap is placed right next to the Vcc pin of the device, and the other side of the cap connects either directly to a topside ground plane or with vias right next to it to a bottomside or inner layer ground plane.

/mike

11

I received the enclosure today, and found that I needed to move the serial port a little closer to the front of the PCB. I only had to extend the TX and RX lines on pins 2 and 3. (I didn’t post new pics of that.) So, if it all looks good to you guys, I think I’m going to send this out to be fabricated in the next few days. I just need to print out a 1:1 scale copy and check that I don’t have any errors in the footprints. I believe that should be it. And, of course, I’ll be sure to post pictures of the completed project here on the forums.

Thanks for the help!

12

I’m not that keen on the path that the middle pin of U6 is taking, through the IC, under the crystal and then back through the IC.

IMO it could easily be taken completely on the left of the IC with a little rerouting.

13

Couldn’t your whole circuit run over 3.3v? ATmega is 1.8-5.5, microchip EEPROM I’m sure can run under 3.3v. MAX232 makes pin similar variants for 3.3v. So in theory, your whole circuit can run off of 3.3v and could get rid of your heat issues with the 5v reg, as well as freeing up board space in case you wanted to (at the last second) add some more functionality.

14

You are correct about the 3.3V. I wanted to make it Arduino compatable, so I used a 16MHz crystal. The 5V is then required for the 16MHz clock. If I had to start from scratch, I think I would do it differently. I kind of looked at this as a learning experience from the start, so I wanted to keep it so I could easily use the Arduino tools. (I started on an Arduino board.) For my next project, I think I’ll be going with that QFP and hopfully not be using Arduino for the software side. I’d like to get into straight C with Atmel Studio or WinAVR.

If this was for production and I started from scratch, I think that I would go with only 3.3V and get rid of some of the parts that I just thew in for fun. For example, I’m really only using one switch on the dip switch. I put in a 4-switch, just in case I think up a new feature. In fact, I was thinking about what you guys said about making it smaller. I figure if were to remove a few things and went all surface mount, it would go down to about 1/3 the size!

I sure did learn a lot doing this and you guys helped teach me a lot.

Thanks again!

15

I second the request for 3.3V only. That way, you could eliminate all your power routing, and just pour polygon power planes.

You can run Arduinos at 3.3V at 8 MHz. Just make sure to select the 8 MHz version in the Arduino IDE. (don’t forget to use the right crystal!)

Last I checked, the ATmegas are (slightly) cheaper in QFP packages instead of DIP packages, and they’re faster to solder, too. It’d also reduce board size.

Usually we wire the input voltage reverse-polarity protection diode ACROSS the supply (anti-parallel, that is), not in series with it. If the input voltage is reversed, the diode shorts and trips the fuse.

For several reasons, switches are normally wired to pull down the MCU’s pin to ground, not pull it up to VCC like you’re doing. It’s not that big of a deal, but you should take advantage of the ATmega’s internal 20k pull-up resistors. If you rewired SW1 to be fed from VCC instead of GND and enabled the built-in pull-ups, you’d eliminate those four resistors.

Layout is fine but not great – you’re not really using power planes very effectively. I don’t see thermals on your vias, which is a good idea. You’re using Eagle, right? I don’t know if it’s capable of that, but most of the pro PCB software lets you do that. Something to think about. Another problem with using Eagle is that it doesn’t show net labels on the actual traces (like Altium does, for example), so it’s hard for me to see which traces are what; but in general, those power traces look a little thin. Maybe not though?

Also, the board seems fairly sparse; if you’re paying per-inch, I’d try to increase the board density a bit by packing components closer.

I have no idea why you have that 5V regulator heat-sinked so much. How much current are you sourcing? less than 30mA? With a voltage drop of 12V - 5V = 7V? That’s, what? 210mW? (Then again, with any luck, you’ll eliminate that 5V regulator altogether).

16

Thanks for the tips. I’ve already sent the board to the fab though, but I’ll keep your tips in mind for future projects.

Is there any benefit to wiring the input protection diode like you say other than not getting the voltage drop?

The input power trace is 40mil and the rest are 24mil. Do you think that is too small? I thought it was overkill. Also, why do you suggest putting thermals on the vias? (Yes, I’m using Eagle.)

Thanks for the tips! :slight_smile:

17

steve1515:
Thanks for the tips. I’ve already sent the board to the fab though, but I’ll keep your tips in mind for future projects.

Is there any benefit to wiring the input protection diode like you say other than not getting the voltage drop?

The input power trace is 40mil and the rest are 24mil. Do you think that is too small? I thought it was overkill. Also, why do you suggest putting thermals on the vias? (Yes, I’m using Eagle.)

Thanks for the tips! :slight_smile:

The traces were way overkill.
18

Hi Guys!

I received my boards and assembled everything. It works nicely. :dance:

Here are some pics. Please let me know what you think.

Once again, thanks for all of the help! :slight_smile:

http://imageshack.us/a/img221/5152/pcbfront.jpg

http://imageshack.us/a/img688/6456/pcbback.jpg

http://imageshack.us/a/img22/4215/boxclosed.jpg

http://imageshack.us/a/img339/788/boxopened.jpg

19

Glad to hear the boards work well! My first board took 5 revisions. Quite painful.

20

Glad to be of help.

/mike