FTDI configuration: Detailed information missing

Development Boards MicroMod
1

Hello,

I am currently working to get a FT232H cable (http://www.ftdichip.com/Support/Documen … 232H-B.pdf) working as JTAG-interface.

I have it partially working, but I am stuck in the configuration details of the FTDI driver.

ftdi_layout_init

From my understanding the first parameter is 16 bits, telling the initial state of a give pin. I assume that the 16bits are mapped to ADBUS0-ADBUS7 and ACBUS0-ACBUS7. But in which order I have to map them from MSB to LSB: D7…D0 C7…C0, or D0—D7 C0…C7, or C7…C0 D7…D0, or C0—C7 D0…D7 ??

How I configure one of the tri-state PINs to High-Z?

The second parameter is direction, What does ‘1’ mean? Input or Output ?

By further reading the documentation I assume, that also the direction is just an initial setting and can be changed later, if needed. If that assumption is right, I think it would be worth noted in the documentation.

ftdi_layout_signal

Here I understand, that I have the possibility to define, which pins are related to a given signal name. Further I assume, that the masks are the same 16 bit, defined above.

In most cases there will be only one bit set, defining that the named signal drives that pin. As this bit is an assignment, the definition if the asserted signal drives the pin high or low is made, by preceding a “n” in front of the name.

“data” defines output pins, which are driven high, when the signal is asserted.

“__n__data” defines output pins, which are driven low.

Two questions: How I define for 3-stated pins the High-Z ? Is it possible to define as well data and ndata, to have diametrical signals on two different pins for an asserted signal?

oe/noe defines the same for the output.

Another question, where I found no answer up to now is regarding the buffers:

What is meant here with buffers or straight connection? Where is the difference? I understand buffers between the pin and the target as a line driver, which will adapt the voltage level. Do I oversee something here?

Excuse me, if some of my questions are too noobish.

It would be great, if someone can answer some of my questions.

Thanks!

2

Second try, as the first time format options went wrong. I hope its now better readable.

I am currently working to get a FT232H cable (http://www.ftdichip.com/Support/Documen … 232H-B.pdf) working as JTAG-interface.

I have it partially working, but I am stuck in the configuration details of the FTDI driver.

ftdi_layout_init

From my understanding the first parameter is 16 bits, telling the initial state of a give pin. I assume that the 16bits are mapped to ADBUS0-ADBUS7 and ACBUS0-ACBUS7.

But in which order I have to map them from MSB to LSB: D7…D0_C7…C0, or D0—D7_C0…C7, or C7…C0_D7…D0, or C0—C7_D0…D7 ??

How I configure one of the tri-state PINs to High-Z?

The second parameter is direction, What does ‘1’ mean? Input or Output ?

By further reading the documentation I assume, that also the direction is just an initial setting and can be changed later, if needed. If that assumption is right, I think it would be worth noted in the documentation.

ftdi_layout_signal

Here I understand, that I have the possibility to define, which pins are related to a given signal name. Further I assume, that the masks are the same 16 bit, defined above.

In most cases there will be only one bit set, defining that the named signal drives that pin. As this bit is an assignment, the definition if the asserted signal drives the pin high or low is made, by preceding a “n” in front of the name.

“data” defines output pins, which are driven high, when the signal is asserted.

“ndata” defines output pins, which are driven low.

Two questions: How I define for 3-stated pins the High-Z ? Is it possible to define as well data and ndata, to have diametrical signals on two different pins for an asserted signal?

oe/noe defines the same for the output.

Another question, where I found no answer up to now is regarding the buffers:

What is meant here with buffers or straight connection? Where is the difference? I understand buffers between the pin and the target as a line driver, which will adapt the voltage level. Do I oversee something here?

Excuse me, if some of my questions are too noobish.

It would be great, if someone can answer some of my questions.

Thanks!

gogol

3

nobody here, who can bring some light into the dark?

4

Sorry gogol - I would like to understand openOCD well enough to help with the documentation. But I don’t think I can get there. Although I can’t provide any answers I think I see a couple of hints in jtag/driver/ftdi.c

struct signal {
	const char *name;
	uint16_t data_mask;
	uint16_t oe_mask;
	bool invert_data;
	bool invert_oe;
	struct signal *next;
};

static int ftdi_set_signal(const struct signal *s, char value)
{
	int retval;
	bool data;
	bool oe;

	if (s->data_mask == 0 && s->oe_mask == 0) {
		LOG_ERROR("interface doesn't provide signal '%s'", s->name);
		return ERROR_FAIL;
	}
	switch (value) {
	case '0':
		data = s->invert_data;
		oe = !s->invert_oe;
		break;
	case '1':
		if (s->data_mask == 0) {
			LOG_ERROR("interface can't drive '%s' high", s->name);
			return ERROR_FAIL;
		}
		data = !s->invert_data;
		oe = !s->invert_oe;
		break;
	case 'z':
	case 'Z':
		if (s->oe_mask == 0) {
			LOG_ERROR("interface can't tri-state '%s'", s->name);
			return ERROR_FAIL;
		}
		data = s->invert_data;
		oe = s->invert_oe;
		break;
	default:
		assert(0 && "invalid signal level specifier");
		return ERROR_FAIL;
	}

	output = data ? output | s->data_mask : output & ~s->data_mask;
	if (s->oe_mask == s->data_mask)
		direction = oe ? direction | s->oe_mask : direction & ~s->oe_mask;
	else
		output = oe ? output | s->oe_mask : output & ~s->oe_mask;

	retval = mpsse_set_data_bits_low_byte(mpsse_ctx, output & 0xff, direction & 0xff);
	if (retval == ERROR_OK)
		retval = mpsse_set_data_bits_high_byte(mpsse_ctx, output >> 8, direction >> 8);
	if (retval != ERROR_OK)	{
		LOG_ERROR("couldn't initialize FTDI GPIO");
		return ERROR_JTAG_INIT_FAILED;
	}

	return ERROR_OK;
}

  • - Looking at the logic in ftdi_set_signal, I think it is safe to say that complementary outputs are not directly supported

  • - (I don't see any function that appears to read an input)
  • - To set an output hi-Z, it looks like you must set both signal and oe masks, then pass a value of 'z' rather than 0 or 1