Gold Phoenix only requires some form of definition for the board outline, it doesn’t necessarily have to be on the silk layer.
I use a mechanical layer in Altium that includes outlines as well as specific manufacturing requirements.
Gold Phoenix only requires some form of definition for the board outline, it doesn’t necessarily have to be on the silk layer.
I use a mechanical layer in Altium that includes outlines as well as specific manufacturing requirements.
Roko:
Gold Phoenix only requires some form of definition for the board outline, it doesn’t necessarily have to be on the silk layer.I use a mechanical layer in Altium that includes outlines as well as specific manufacturing requirements.
That makes a lot more sense to me than having the PCB boundary defined by the silk layer (which would require GP to manually select the appropriate lines on the silk layer and convert them to a different layer).
Olimex goes to the opposite extreme, and asks that the boundary be defined on copper layers, as well as silk (at least they did in the past). I guess this is because they manually cut the boards with a guillotine, but it is a real pain when you get thin slivers of copper coming off the edges of a board.
I can tell you that even though I use top silk to show my board outline, they never actually produce that silk on the final board. Either they delete it from the final file used OR when they v-score or route, the silk is lost in the kerf. Either way, I never see it on the end product.
They would be manually converting it to whatever layer they use for the CNC router. This seems like more work than having a separate file (keepout / mechanical) for board outline.rpcelectronics:
I can tell you that even though I use top silk to show my board outline, they never actually produce that silk on the final board. Either they delete it from the final file used OR when they v-score or route, the silk is lost in the kerf. Either way, I never see it on the end product.
Likewise. I use a .gbr border gerber file that is just the "Dimension" layer from EAGLE.MichaelN:
I've never had them require this. I use Protel, and normally put the board outline on the "Keepout" layer. I include a "Readme.txt" with the Gerbers that explicitly states what each Gerber file is for...rpcelectronics:
Before you submit your design, make sure to create a border of your board in the silkscreen layer. This is a requirement that Shane has to make sure they route the board properly.