Hi there - has anybody here ever made a solder paste stencil using Eagle? What service did you use?
Thanks!
Couldn’t you just use an inverse of the soldermark stop layer?
I remember reading that SFE use (or used to use) http://www.pololu.com/ as they have a custom laser cutting service.
Apparently soon we will be able to get stencils for our boards through BatchPCB!!! 
gussy - Eagle actually has layers for top & bottom solder paste… not that I’ve actually set up any of my custom components to use it. Oops, suppose I should change that… :?
Nutter:
gussy - Eagle actually has layers for top & bottom solder paste…
Nutter,
I recently found out that EAGLE has keepout layers (39 top and 40 bottom), which are turned off unless one selects them. With them on, and if parts are packed too close, or traces; vias; or pads cross the zones, the DRC will generate errors.
I went back to my last SMT PCB and found that I had violated the keepout by placing SMT parts too close to each other. I made this discovery while the PCB was being fabbed at BatchPCB. Hmm.
Turns out that no harm was done, I was able to build the board correctly. The crowding of the SMT parts made soldering by hand with paste (and no stencil) a bit harder.
Back in EAGLE I now turn on those layers when running DRC. My SMT parts are not as tightly packed (and some had to go on the back side of the boad in my last project).
I’ve noticed that many SMT parts that I pull from the existing library don’t have anything on the keepout layers. I’m thinking of adding a keepout to these as I need them, and also for new parts that I build.
I’m further along the learning curve than, say, six months ago. I think there’s plenty to still do to make neat and tidy PCBs that are easy to assemble. I view this as a bonus in my hobby activity.
Comments Welcome!
bigglez:
Nutter:
gussy - Eagle actually has layers for top & bottom solder paste…Nutter,
I recently found out that EAGLE has keepout layers (39 top and 40 bottom), which are turned off unless one selects them. With them on, and if parts are packed too close, or traces; vias; or pads cross the zones, the DRC will generate errors.
I went back to my last SMT PCB and found that I had violated the keepout by placing SMT parts too close to each other. I made this discovery while the PCB was being fabbed at BatchPCB. Hmm.
Turns out that no harm was done, I was able to build the board correctly. The crowding of the SMT parts made soldering by hand with paste (and no stencil) a bit harder.
Back in EAGLE I now turn on those layers when running DRC. My SMT parts are not as tightly packed (and some had to go on the back side of the boad in my last project).
I’ve noticed that many SMT parts that I pull from the existing library don’t have anything on the keepout layers. I’m thinking of adding a keepout to these as I need them, and also for new parts that I build.
I’m further along the learning curve than, say, six months ago. I think there’s plenty to still do to make neat and tidy PCBs that are easy to assemble. I view this as a bonus in my hobby activity.
Comments Welcome!
Typically there are hundreds of those keep-out errors on my boards - but I always ignore them and have never had a problem. I’d be interested to hear how those layers are calculated and what their purpose is. Maybe something to do with how parts are dropped on boards in production environments, or how they are soldered in production environments? I’ll say that I’ve never had an issue due to that.