Maximum APB frequency on LPC213x/01

Development Boards MicroMod
1

I am working on a project based on the LPC2134/01. I want to increase the peripheral bus speed, but have not found a clear definition of what is allowable.

According to the user manual (UM10120): “The APB Divider serves two purposes. The first is to provides peripherals with desired PCLK via APB bus so that they can operate at the speed chosen for the ARM processor. In order to achieve this, the APB bus may be slowed down to one half or one fourth of the processor clock rate. Because the APB bus must work properly at power up (and its timing cannot be altered if it does not work since the APB divider control registers reside on the APB bus), the default condition at reset is for the APB bus to run at one quarter speed.”

From this I would think that there is an upper limit for the peripheral bus speed, but neither in the data sheet nor the user manual have I been able to find a maximum value.

Now, when looking through the user manual regarding GPIO, I see the example in figure 8-17. The text says: “The PLL generated FCCLK =60 MHz out of external FOSC = 12 MHz. The MAM was fully enabled with MEMCR = 2 and MEMTIM = 3, and APBDIV = 1 (PCLK = CCLK).”

So from this it would appear that running the core at 60MHz and the APB divider at 1 (PCLK also 60MHz) is legal.

Can anyone point me to a case where the APB divider must be lowered for the system to work? Or is this only relevant for limiting power consumption?

Thanks in advance.

2

The peripheral bus can always work at 60MHz.

Setting it to a lower speed just reduces power consumption.

3

Thanks for your reply.

It works fine at 60MHz. I still don’t quite understand why this is presented as an argument for having the APB divider at 4 after reset. I was reluctant to try 60MHz PCLK until I saw the example in the data sheet.

Oh well. Everything works fine now at 60MHz. :smiley:

4

Probably because the APB is a “module” that is found also in other ARM based chips, that perhaps run at a much higher frequency, and whose peripherals require to be slowed down with respect to the CPU core.

However the LPC series does not have such problems.