LPC2103 - Peripheral Bus Clock Rate

Development Boards MicroMod
1

I have Keil’s MCB2103 evaluation board which I’m using to learn ARM.

I was testing VPBDIV setting and for some reason the board becomes non response if I set to clock divider to 1. Dividers 2 and 4 work but not 1. Any ideas? I have to use flash magic to reset the board after setting divider to 1.

2

NXP docs discuss max peripheral bus rate. Often slower than osc. freq.

3

On LPC2138, max periph. bus freq is 30MHz. If you set PLL to have core at 60MHz, VPBDIV should be 2.

Shoukld certainly be similar on LPC2103.

Angelo

4

Polux rsv:
On LPC2138, max periph. bus freq is 30MHz. If you set PLL to have core at 60MHz, VPBDIV should be 2.

Shoukld certainly be similar on LPC2103.

Not all LPC2xxx devices have this limitation:

“The peripheral bus (VPB) is capable of running with the same max. speed as the ARM7 system bus (AHB), which is 60MHz (using VPBDIV=1).”

http://www.nxp.com/cgi-bin/faq/faq.pl?q … d=42&fid=3

The problem here may be that one of the peripherals on the MCB2103 requires a lower speed or some other startup settings have to also be adjusted (e.g. UART initialisation).