Anybody know what the max APB clock (PCLK) rate is for the LPC2103? I can’t find a spec for it, but there is a divider circuit and an explanation that the divider circuit is there to make sure that APB works…
Thanks.
Anybody know what the max APB clock (PCLK) rate is for the LPC2103? I can’t find a spec for it, but there is a divider circuit and an explanation that the divider circuit is there to make sure that APB works…
Thanks.
Max PCLK is CCLK which is 70 MHz (or 60 MHz, i forget).
Just set the APBDIV to 1 to set it to the same as processor clock. Then set that to whatever you want.