Chris and Mike - A HUGE Thank you!!! Your comments are incredibly helpful. I am very grateful.
Chip - re: “RFM series do not appear to share the quirk of the cc3000 on the MISO line.” I agree - I will remove the 74HC1G. Less parts, less soldering!! (The thought process I was having was potentially prototyping the RFM69HW with the cc3000 (instead of Ethernet). In that case, I have run into this with the RFM series…poor RFM chip could not move MISO once the cc3000 floated the traffic lane.)
Chip/Mike - re: 1) bypass capacitors go in parallel (both) 2) caps between 3.3V and GND (Mike). Ach - thank you. I changed the schematic. I decided to get rid of the bypass capacitors that are not near the voltage regulators. This simplifies the schematic and is similar to what other similar schematics I learned from do. However - I am glad I made this mistake here so that I could learn!
Mike - re: change TEST testpoint (which has two pin components) to TST which is single-pin. Done. Updated schematic.
Mike - re: 5V SPI lines (MOSI, CS, CLK from Arduino) to 3.3V SPI from RFM69HW. Your recommendation makes a lot of sense. Done. I renamed MOSI_5V, CS_5V, CLK_5V for net prior to the level shifter and MOSI_3V3, etc. after.
Mike - the antenna pin is shorted to GND. Done - updated schematic.
Mike - there’s a wire not connected in the middle of C7. Fixed by removing the additional bypass capacitors.
Mike - DIR (U2 - level shifter) needs to be connected. DONE. Noted in the “FUNCTION TABLE” (p 2 of data sheet) that ~OE = L and DIR = H is for data going from A bus to B bus. So I connected DIR to 3v3.
Mike - All unused input should be grounded. Done. Schematic updated (I see this is noted in the data sheet on p. 4: “All unused inputs of the device must be held at VCC or GND to ensure proper device operation.”
Mike - U2 and U3’s values are missing the last few digits. DONE. The challenge with longer value names is they appear in Pcbnew (laying out parts). When I was learning Pcbnew, I found the longer names made it more difficult to do the part layout….
Mike - it looks better to have the wire entering a ground symbol from above. Done. I was wondering if putting a gnd symbol flat with the net looked ok…I hadn’t seen other schematics with it, but it seemed reasonable. Does look weird.
Chip - resolution of image. I didn’t realize I could plot the schematic to the clipboard. hopefully, the new image is easier to read (although the resolution is 888 x 435 px…which doesn’t sound like a great resolution to me…).
Both - again THANK YOU very much.