Hi,
What speed should I expect of openOCD when loading debug ELF file into ram (in Linux)? The speeds I’m having are around 300bytes/s with usbprog and J-Link dongles tested on 2 differrent computers… Is this normal? It akes around a couple of mins to load my code into RAM…
Would be grateful if somebody helped me out… I’m trying to convince my company into switching to open source alternatives to IAR for ARM development and I don’t have a case with such low speeds…
Thanx
Hi (again)
I typed this command:
flash info 0
And the output was:
#0: at91sam7 at 0x00100000, size 0x00080000, buswidth 4, chipwidth 0
at91sam7_old information: Chip is AT91SAM7S512
cidr: 0x270b0a40, arch: 0x0070, eproc: ARM7TDMI, version:0x000, flashsize: 0x00080000
master clock(estimated): 0kHz
flashplanes: 2, pagesize: 256, lock regions: 32, pages in lock region: 64
lockbits[0]: 0xffff, lockbits[1]: 0x7220, securitybit: 0, nvmbits(2): 0x0
Could this be my problem? that openOCD thinks that my MPU speed is 0KHz and runs only on the slow clock wich makes it ectremly slow for both flashing & debugging in RAM?
How do I tell openOCD the speed of my MPU? My MPU is an ARM AT91SAM7S512…
I found this thread dating aprox 1 year ago
I tried to enable the MAINRDY bit in the CKGR_MCFR register with the “mww” command in openOCD but that didn’t help… Is it possible to get openOCD to compute the correct speed?
/desperat need for help…
Hi,
I wrote a new flash driver for at91sam7 and it’s added to openocd trunk but it’s not enabled by default. Bellow are the steps to activate the new driver:
1) You must disable the old driver from src/flash.c file, recompile and see if it works:
/* flash drivers
*/
extern flash_driver_t lpc2000_flash;
extern flash_driver_t cfi_flash;
extern flash_driver_t at91sam7_flash;
//extern flash_driver_t at91sam7_old_flash;
extern flash_driver_t str7x_flash;
extern flash_driver_t str9x_flash;
extern flash_driver_t aduc702x_flash;
extern flash_driver_t stellaris_flash;
extern flash_driver_t str9xpec_flash;
extern flash_driver_t stm32x_flash;
extern flash_driver_t tms470_flash;
extern flash_driver_t ecosflash_flash;
extern flash_driver_t lpc288x_flash;
extern flash_driver_t ocl_flash;
extern flash_driver_t pic32mx_flash;
flash_driver_t *flash_drivers[] = {
&lpc2000_flash,
&cfi_flash,
&at91sam7_flash,
// &at91sam7_old_flash,
&str7x_flash,
&str9x_flash,
&aduc702x_flash,
&stellaris_flash,
&str9xpec_flash,
&stm32x_flash,
&tms470_flash,
&ecosflash_flash,
&lpc288x_flash,
&ocl_flash,
&pic32mx_flash,
NULL,
};
2) Update your configuration file with new flash setup commands.
Below is the help from new driver file src/at91sam7.c:
* New flash setup command:
*
* flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
*
* <ext_freq_khz> - MUST be used if clock is from external source,
* CAN be used if main oscillator frequency is known (recomended)
* Examples:
* flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 25000 = RECOMENDED
* flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 25000 (auto-detection, except for clock) = RECOMENDED
* flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 0 == NOT RECOMENDED !!! ==
* flash bank at91sam7 0 0 0 0 0 (old style, full auto-detection) == NOT RECOMENDED !!! ==
3) In order to modify GPNVM bits the command has changed:
**at91sam7 gpnvm set|clear**Examples:
set bit 0: at91sam7 gpnvm 0 set
clear bit 1: at91sam7 gpnvm 1 clear
Hope it will be useful for you.
Let me known if you have other questions.
Thanks,
Atlas
Thanx for your reply
I’ve tried your advice and it doesn’t improve the flash/debug speed 
but it detects the mpu speed all right
here’s the output of “flash info 0”:
#0: at91sam7_new at 0x00100000, size 0x00040000, buswidth 4, chipwidth 0
at91sam7 driver information: Chip is AT91SAM7S512
Cidr: 0x270b0a40 | Arch: 0x0070 | Eproc: ARM7TDMI | Version: 0x000 | Flashsize: 0x00040000
Master clock (estimated): 48054 KHz | External clock: 18432 KHz
Pagesize: 256 bytes | Lockbits(16): 15 0xfffe | Pages in lock region: 960
Securitybit: 0 | Nvmbits(2): 2 0x3
I had to use:
flash bank at91sam7_new 0 0 0 0 0 0 0 0 0 0 0 0 xxxxxx
instead of at91sam7
My biggest issue right now is the debug in ram speed wich is really slow… I can send you the config files if you want?
Can you post your configuration file ?
This is my file:
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface ft2232
ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8
jtag_khz 1000
jtag_ntrst_delay 200
jtag_nsrst_delay 200
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target create CMDNAME TYPE [configure-options]
target create AT91SAM7X arm7tdmi -endian little -chain-position 0
AT91SAM7X configure -event old-pre_reset { jtag_khz 1000 }
AT91SAM7X configure -event old-post_reset {
jtag_khz 6000
# disable watchdog
mww 0xfffffd44 0x00008000
# enable user reset
mww 0xfffffd08 0xa5000001
# CKGR_MOR : bypass oscillator
mww 0xfffffc20 0x00000002
######## 48 MHz ########
# PMC_MCKR : select CSS MCK = MAIN
mww 0xfffffc30 0x00000001
sleep 100
# MC_FMR: flash mode (FWS=2 3r-4w, FMCN=80)
mww 0xffffff60 0x00500200
sleep 100
}
flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 48000
working_area 0 0x00200000 0x10000 nobackup
gdb_memory_map enable
gdb_flash_program enable
arm7_9 dbgrq enable
# speed up memory downloads
arm7_9 dcc_downloads enable
With this file I get ~2KB/s. Take care that this file may be outdated and not fully compatible with latest releases of openocd.
PS:
By the way, if you want to see the second bank type: flash info 1
I never tested the driver with a chip with 2 banks, so there is a big probability to have some bugs …
Hi,
flash probe 1 does not work with neither drives at91sam7 old or new.
First the debug in RAM speed didn’t change much. still about 300-400 bytes/s (it takes a couple of min to load my program).
This is most ennoying for me since it take so long time to debug things
Now the flashing: With at91sam7_old I can flash at about 0.27 kb/s (wich is slow but I can live with it)
With at91sam7_new I was not able to flash at all (although the MCK detection was right): Here is the filterd output
memory write caused data abort (address: 0xffffff60, size: 0x4, count: 0x1)
Runtime error, file “command.c”, line 456:
failed setting protection for areas 0 to 31 (-901)
failed erasing sectors 0 to 31 (-901)
BUG: keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1027)
status register: 0xffff0305
Lock Error Bit Detected, Operation Abort
error writing to flash at address 0x00100000 at offset 0x00000000 (-902)
My hardware: AT91SAM7S-512 MPU and a USBPROG dongle from http://www.embedded-projects.net/index.php?page_id=165
Here is the cfg file I use:
------------------------------------- CONFIG FILE --------------------------------
telnet_port 4444
gdb_port 3333
interface usbprog
jtag_speed 0
reset_config srst_only srst_pulls_trst
jtag newtap at91sam7s cpu -irlen 4 -ircapture 0x1 -irmask 0xf
target create at91sam7s.cpu arm7tdmi -endian little -chain-position at91sam7s.cpu -variant arm7tdmi
at91sam7s.cpu configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
#flash bank at91sam7 0 0 0 0 0
flash bank at91sam7_new 0 0 0 0 0 0 0 0 0 0 0 0 18432
---------------------------------- END OF CONFIG FILE ---------------------------------
This is my debug script:
----------------- DEBUG SCRIPT ------------------------------------------------------
target remote :3333
monitor fast enabled
set remotetimeout 1000
set mem inaccessible-by-default off
## Init - taken form the script openocd_at91sam7_ecr.script
monitor mww 0xfffffd44 0x00008000 # disable watchdog
monitor mww 0xfffffd08 0xa5000001 # enable user reset
monitor mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator(18.432MHz)
monitor sleep 100
monitor mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz(18.432MHz/14*(72+1))
monitor sleep 100
monitor mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 = 48 MHz
monitor sleep 100
monitor arm7_9 dbgrq enable
monitor arm7_9 fast_memory_access enable
monitor arm7_9 dcc_downloads disable
monitor gdb_breakpoint_override hard
monitor gdb_memory_map enable
load
------------------------------------END OF DEBUG SCRIPT -----------------------------------
The flash script (using GDB as well):
----------------- FLASH SCRIPT (GDB)------------------------------------------------------
target remote :3333
set remotetimeout 1000
monitor reset halt
monitor soft_reset_halt
monitor gdb_memory_map enable
monitor gdb_flash_program enable
monitor arm7_9 dbgrq enable
monitor arm7_9 dcc_downloads enable
monitor arm7_9 fast_memory_access enable
monitor armv4_5 core_state arm
## Init - taken form the script openocd_at91sam7_ecr.script
monitor mww 0xffffff60 0x00320100 # set flash wait state (AT91C_MC_FMR)
monitor mww 0xfffffd44 0x00008000 # disable watchdog
monitor mww 0xfffffd08 0xa5000001 # enable user reset
monitor mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator(18.432MHz)
monitor sleep 100
monitor mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz(18.432MHz/14*(72+1))
monitor sleep 100
monitor mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 = 48 MHz
monitor sleep 100
monitor flash protect 0 0 31 off
monitor flash erase_sector 0 0 31
monitor flash write_image bin/D-METER-flash.bin 0x00100000 bin
monitor flash protect 0 0 31 on
monitor mdw 0x00100000 0x100
monitor mww 0xfffffd08 0xa5000401 # enable user reset
monitor reset
quit
------------------------------------END OF FLASH SCRIPT -----------------------------------
By the way DCC download never worked when debugging in RAM: Here is the output of the error:
Error: 4024 295801 arm7_9_common.c:2424 arm7_9_bulk_write_memory(): DCC write failed, expected end address 0x00203f80 got 0x0
Error: 4025 295801 gdb_server.c:1151 gdb_error(): unexpected error -4
Sorry for the long reply, I really hope you don’t get bord 
I really appreciate it, Thanx