Well when i run the silk gen thing this is what is happening with my boards…
Is the yellow text supposed to be like that/? Should i just flip it around so its ontop of the white?
Well when i run the silk gen thing this is what is happening with my boards…
Is the yellow text supposed to be like that/? Should i just flip it around so its ontop of the white?
markland556:
Well when i run the silk gen thing this is what is happening with my boards…Is the yellow text supposed to be like that/? Should i just flip it around so its ontop of the white?
markland556,
A1: No, (I think there’s a bug in the SPE supplied silk gen macro, or some library parts are not built correctly).
A2: Yes, flip it to match your original text. Turn off all layers, turn on layers 20, 121, 122, to check.
This is what your board will look like. Check that text on the top (121) is right reading and text on the bottom (122) is mirrored. text on layers tNames (25) and bNames (26) will be lost in the SPE-Special macro.
Comments Welcome!
Peter
what do you mean that layer 122 will be mirrored?? Isnt that whats happening?? The yellow layer is 122.
markland556:
what do you mean that layer 122 will be mirrored?? Isnt that whats happening?? The yellow layer is 122.
markland556,
If you didn’t intend to have text on the back of the your board something is wrong…
Check where the original text (that you created and placed) is really on a top layer. If not, move it, then run silk_gen again.
All EAGLE projects are viewed from ‘above the top layer’. If text appears on the bottom layer it can only be read through the board, and it will be mirrored.
Success with silk_gen will create two new layers for silk top and silk bottom, as noted in earlier.
Comments Welcome!
Peter
O, well i made the text in the dimension layer.
also i submitted my design to the DRC bot and i havent gotten any emails…
markland556:
also i submitted my design to the DRC bot and i havent gotten any emails…
markland556,
Just spotted a new thread that suggests a problem at BatchPCB. Here’s my reply to Ben:
Ben,
Hmm. I think it’s a BatchPCB problem. My recent PCB upload (Friday afternoon) has also been ignored. Usually the email from them arrives almost immediately.
The close date and time is Sunday at midnight. Missing it means it could sit for one whole week - hopefully the recent designs are spooled somewhere and will be allowed in for Monday’s dispatch to China. (Hint Hint, Nathan or Matt if you are reading this thread).
Comments Welcome!
Peter
So what layer do i want to be putting that text in so it shows up only on the top silscreen??