pseudo ground plane in Eagle - how to pour

I’m trying to fill unused area on my PCB with copper by putting a top layer polygon over the top with isolation set to 10 mils… but no gaps appear, it just looks like a solid chunk of top copper.

Could someone point me in the right direction?

Thanks in advance.

Cannibal:
I’m trying to fill unused area on my PCB with copper …

Cannibal,

What CAD tools are you using? EAGLE, I hope… (I’m an EAGLE user).

Comments Welcome!

You have to name the polygon. Click on the outside line (the one you drew) and name it something unique. Also make sure to hit ratsnest afterward.

James L

What CAD tools are you using? EAGLE, I hope… (I’m an EAGLE user).

Yep, it’s eagle.

You have to name the polygon. Click on the outside line (the one you drew) and name it something unique. Also make sure to hit ratsnest afterward.

propellanttech:
You have to name the polygon. Click on the outside line (the one you drew) and name it something unique. Also make sure to hit ratsnest afterward.

Greetings,

I agree, and I also struggled with it the first time. Only use the POLYGON tool (the rectangle does not work) and the result may have a unique shape with many segments. If it is a ground or power plane, use the NAME tool so that tp match the netname that it connects to. Also, select the isolation spacing, fill (hatch or solid) and whether the segments may be left unconnected (orphans) with the CHANGE tool. It is necessary to click on the plane boundary after each change and also to redraw the fill using the RATSNEST tool.

The Polygon fill takes a lot of computer horsepower to keep it updated each time the view is changed, so its best to only fill it (with RATSNEST) at the end of the session as a final check of your work. If in doubt use a third party Gerber viewer to check the output before fabrication.

HTH, and Good Luck!

Cannibal:
I’m trying to fill unused area on my PCB with copper by putting a top layer polygon over the top with isolation set to 10 mils… but no gaps appear, it just looks like a solid chunk of top copper.

Cannibal,

I forgot to mention that some circuitry should not include a ground (or power) plane as the additional capacitance can adversely affect it.

For example, any crystal or RC controlled oscillator may slow due to added capacitance, or worse, respond to noise induced in a ground plane.

The same is true of operational amplifier inputs or other low level high impedance circuits. In circuits carrying high current care is needed to keep the return currents (in the planes) away from low level input circuits. In general, areas of unconnected metal (orphans) should be avoided, particularly in multi-layer PCBs. On the other hand, internal layers should have about the same metal area for thermal balance during manufacture.

Components connected to the planes (particularly on the outer layers) should include a thermal break to allow soldering of components during assembly. I find that heavy traces, 50mil for example, also require a thermal break at an SMT pad for the same reason.

Finally, ground planes should be keep away from primary side power (AC mains) if it is present on the same PCB.

PM me if you’d like to see some examples.

Comments Welcome!

I forgot to mention that some circuitry should not include a ground (or power) plane as the additional capacitance can adversely affect it.

For example, any crystal or RC controlled oscillator may slow due to added capacitance, or worse, respond to noise induced in a ground plane.

The same is true of operational amplifier inputs or other low level high impedance circuits. In circuits carrying high current care is needed to keep the return currents (in the planes) away from low level input circuits. In general, areas of unconnected metal (orphans) should be avoided,

Luckily I don’t have any analog measurements to take in this design, but still thanks for the reminder as I had completely forgot about the crystal considerations. :shock:

bigglez:
I forgot to mention that some circuitry should not include a ground (or power) plane as the additional capacitance can adversely affect it.

For example, any crystal or RC controlled oscillator may slow due to added capacitance, or worse, respond to noise induced in a ground plane.

Hi Peter - this is interesting to me. I had always thought that it was important to add a ground plane beneath a crystal to protect it from noise. So you're saying it's better to actually have a hole in your ground plane beneath a crystal?

Thanks,

-Mike

NleahciM:

bigglez:
For example, any crystal or RC controlled oscillator may slow due to added capacitance, or worse, respond to noise induced in a ground plane.

Hi Peter - this is interesting to me. I had always thought that it was important to add a ground plane beneath a crystal to protect it from noise. So you're saying it's better to actually have a hole in your ground plane beneath a crystal?

Mike,

A crystal element (or ceramic resonator, or watch crystal) requires active circuitry to operate, the energy level is very low and the circuit impedances therefore high (ten or hundreds of k-ohms). This makes the connecting traces very susceptible to capacitively coupled voltage noise pick up. The area under the device should not contain other signal lines, just open space. Even noisy power or ground traces on another layer can harm the circuit’s accuracy.

If your PC has a clock that drifts it’s probably because of poor layout around the RTC chip and crystal.

The second issue is that crystal elements are calibrated for a given load capacitance, adding any extra capacitance loads the circuit, which may stall, or pulls it off frequency. Only one or two pF will contribute to timing errors. Ground planes should be removed under the crystal element and interconnecting traces.

This rule does not apply to self-contained powered crystal oscillators, which contain all the circuitry and crystal element in a metal can.

Other circuits, such as the input terminals of op amps can pick up stray signals coupled capacitively from ground planes. In high speed (wide bandwidth) circuits the stray capacitance to ground will slow signal edges (or cause peaking if applied in the negative feedback path of a closed loop stage). Keep the ground plane away from the inputs terminals and feedback components.

In other PCB structures the signals on one layer are deliberately adjacent to ground planes on another layer below (called microstrip) or two ground layers one above and one below the signal (Stripline) to make the signal path into a transmission line. This is important for high speed (or high frequency) signals that require correct matching to reduce signal losses.

When high current passes through a ground plane the resulting voltage drop may modulate the power to other parts of the circuit, so care is needed to get the ground or power current flow away from inputs. Motor controllers and high current output switching supplies are very dependent on correct PCB design.

Finally, without the correct layout CCFL inverter circuits (found in many backlighting designs) do not work well. These use high voltage (approx. 1000V to strike, three to five hundred to run) and high frequency (50 – 100 kHz). Adding one or two pF of load capacitance can increase losses and reduce efficiency.

Comments Welcome!

Peter,

So…I have a device who’s design spec suggests running a GND plane copper pour underneath it. Would I be okay to just add a top and bottom restrict to create empty space rather than do a copper fill?

Julian

jbleecker:
Peter,

So…I have a device who’s design spec suggests running a GND plane copper pour underneath it. Would I be okay to just add a top and bottom restrict to create empty space rather than do a copper fill?

Julian,

That’s a “definite maybe” question. If the data sheet gives an example layout, or apps hints, to include the ground I’d do the same in a new design.

On the other hand, if the part has the ground for shielding, and you don’t have a ground plane (single side PCB, protoboard, etc.) I’d make sure nothing is under the device.

The two things that spring to mind are whether the ground plane is a heatsink and whether the part has power (switchmode supply or audio amplifier); sensor analog; RF; or IR (photodiode) functions that operate at low levels?

Care to post a URL to the data sheet, you have my curiosity up?

Comments Welcome!

Sorry for the delay…I got lost in Death Valley.

Here’s the part:

<a href="http://www.maxim-ic.com/quick_view2.cfm … >DS1306</a>, and the data sheet has recommendations about running a ground plane under the crystal and a bit under the chip. I’m running some under the crystal. Spot on, laser-guided smartbomb accuracy isn’t anywhere near an issue in my particular design, so I’m not getting too hopped up. If the thing drifts a minute a day, it won’t matter for what I’m doing.

Julian

jbleecker:
Sorry for the delay…I got lost in Death Valley.

Here’s the part:

<a href="http://www.maxim-ic.com/quick_view2.cfm … >DS1306</a>, and the data sheet has recommendations about running a ground plane under the crystal and a bit under the chip. I’m running some under the crystal.

Julian,

I use the DS1307 a lot and it has the same wording and recommendations about layout. The most important thing is not to add too much capacitance (with large ground planes) as it may stall the oscillator. Such a problem is very hard to fix (spin the PCB design…)

Next on the list is to keep all other signals away from the RTC Xtal pins for fear of coupling in noise.

Finally, if you are looking for accuracy add a small trimmer cap across the crystal. Once the pads are in place you have the option of deleting the trimmer, but adding one after the fact is not so easy.

Take a look at the Dallas/Maxim app. note number 58, [here.

Here’s a layout I’m using for the DS1307 (8SOT) version (Battery back up and 1PPS led, I2C bus pull up and matching resistors):

http://www.stonard.com/SFE/DS1307_layout.jpg

On a double-sided 0.063 thick PCB (BatchPCB for example) the ground plane on the bottom layer will be okay. Thinner boards (or multi-layer with internal ground planes) are a problem.

Death Valley, eh? I was thinking only this morning, as I got help changing a flat tire, when was the last time and place that I got a flat? Death Valley California! Quite some years ago on the road from Pahrump Nevada to Ridgecrest California having taken a short cut on an unpaved road across Death Valley State Park. Not a big problem, but things can unravel fast on those lonely backroads.

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