RJ45 modules tracing

Community PCB Design
1

Hello all! First of all sorry for my english.

I am creating pcb with RJ45 modules like this

[<LINK_TEXT text=“http://img.radiokot.ru/files/106011/thu … p6kdur.jpg”>http://img.radiokot.ru/files/106011/thumbnail/n0gp6kdur.jpg</LINK_TEXT>

There are 2 modules, each contain 8 RJ45 connectors, every of them need to be connected by parallel by bus, like in this schema:

[<LINK_TEXT text=“http://img.radiokot.ru/files/106011/thu … jejfch.png”>http://img.radiokot.ru/files/106011/thumbnail/n0gjejfch.png</LINK_TEXT>

Eagle generated next tracing:

[<LINK_TEXT text=“http://img.radiokot.ru/files/106011/thu … jf2g6r.png”>http://img.radiokot.ru/files/106011/thumbnail/n0gjf2g6r.png</LINK_TEXT>

I think this is so complex design. If it possible and will be wonderfull to make it more simple.

Thank you a Lot!

Leo. :)](http://img.radiokot.ru/files/106011/medium/n0gjf2g6r.png)](http://img.radiokot.ru/files/106011/medium/n0gjejfch.png)](http://img.radiokot.ru/files/106011/medium/n0gp6kdur.jpg)

2

What is so complex about it? Are you talking about the board? First hint, don’t use the auto-router. Manually route the board yourself.

3

Also, check your fab house design rules. If you can get a trace between pads it will simplify the routing enormously.

4

uChip:
Also, check your fab house design rules. If you can get a trace between pads it will simplify the routing enormously.

Thank u very much for your reply.

I’ve set more narrow trace, and have reduced clearance in the design rule settings of Eagle. And now i get this

result, but i afraid of troubles in making this pcb with such narrow traces…

[<LINK_TEXT text=“http://img.radiokot.ru/files/106011/thu … 0d4l4o.png”>http://img.radiokot.ru/files/106011/thumbnail/n1o0d4l4o.png</LINK_TEXT>](http://img.radiokot.ru/files/106011/medium/n1o0d4l4o.png)

5

That is why uChip said to ask your PCB manufacterer service which trace dimensions are allowed or recommended.

What are those traces going to conduct any way? Signal level currents or power currents? That might be another limiting factor on the minimum width.

6

Valen:
That is why uChip said to ask your PCB manufacterer service which trace dimensions are allowed or recommended.

What are those traces going to conduct any way? Signal level currents or power currents? That might be another limiting factor on the minimum width.

Thank you. This will be traces for signals and for low power current. I will think about limitations, which may arise during the development process.

7

What fab house are you using? Do you really have 3 separate boards with traces connecting them? Get rid of the right angles…

8

kevinlexus:

uChip:
Also, check your fab house design rules. If you can get a trace between pads it will simplify the routing enormously.

Thank u very much for your reply.

I’ve set more narrow trace, and have reduced clearance in the design rule settings of Eagle. And now i get this

result, but i afraid of troubles in making this pcb with such narrow traces…

[<LINK_TEXT text=“http://img.radiokot.ru/files/106011/thu … 0d4l4o.png”>http://img.radiokot.ru/files/106011/thumbnail/n1o0d4l4o.png</LINK_TEXT>[/quote]

If you are making this at home, you may have to worry about narrow traces. If you are going to use a board house, then check its design rules. Most places can handle traces and spaces down to 8 mil. Some can do 6 mil.

Regarding your board - traces should intersect only at 90 degrees, not something smaller like 45 degrees. BTW, 90 degree corners are OK, though 45 degree corners look better.](http://img.radiokot.ru/files/106011/medium/n1o0d4l4o.png)