I am putting the finishing touches on my first PCB, before sending it off to BatchPCB, and have two questions:
I’m getting loads of “Stop Mask” errors when I do a DRC, due to overlap between the drawings in the tPlace layer, and areas where the solder mask will not be applied. This makes sense, since I wouldn’t want to silkscreen on top of the bare copper. But I’m getting these errors even on SparkFun’s TQFP-32 package, so I wonder if they are actually a problem. Will the fab simply ignore the parts of the silkscreen that are on bare copper?
In his latest Eagle tutorial (http://www.sparkfun.com/commerce/tutori … als_id=115), Nathan indicates that he keeps the silkscreen layer, tPlace, pretty sparse. He leaves most placement information out of the layer, and opts instead to focus on information relevant to the user. I think this is a great idea, but can’t figure out how to remove some items from the tPlace layer (e.g. the outline of a resistor). Surely I don’t need to create new parts just to stop the old ones from appearing in tPlace.
first, check to see that you don’t also have document or tdocu layers turned on.
Some eagle parts have way too much drawn in the tplace layer. tplace should have exactly what you want on the “silk screen” (aka legend) layer. I like tdocu for info to help me understand part outline and orientation.
It’s easy enough to make a copy of the part and move the offending stuff to the proper layer (tdocu for me). Create the library you want and have it open. Then go to the control panel, expand the libraries section, expand the library that has the bad part, right click on the part and select copy to library. Then go back the lib editor, open the part, figure out which package it uses and edit that. Select change/layer - tdocu and click on the parts that you want on that layer. save the lib, go to the schematic, library/use the new library and then replace the offending parts.