Str9-Comstick can't halt

Hi,

I have a STR9-Comstick device http://www.hitex.com/str9-comstick/ and I am debugging using OpenOCD.

However I cant get it out of the running state. The hardware I am using does not have a reset button and the JTAG I think is embedded into the device.

I have tried all the usual reset, halt etc commands, although I am still quite new to this field.

Can anybody help me?

Thanks,

Tom

I seen you are still having problems, what version of openocd are you using - i suggest getting the latest from svn.

Can you provide a debug log and config script?

Regards

Spen

Hi Spen,

Thanks for your help so far, the version of openOCD I am running is the latest I think I have this output when I type version: Open On-Chip Debugger (2007-04-16 19:30 CEST).

I think it is working fine. I have been able to run commands in it no problem. I think I managed to write to the flash using IAR workbench (FREE RTOS Embedded Ethernet demo) listing the telnet address as the destination for the dubug (localhost 4444), it hung the IAR.

But that is not the problem the main issue is that since then it gives me the following out put to various commands, I can seem to stop it running. Lots of output to commands included below:

Cheers,

Tom

Open On-Chip Debugger

poll

target state: running

halt

requesting target halt…

reset

poll

target state: running

erase_flash 0 0 0

Command erase_flash not found

bp 0 3

target must be halted to set breakpoints

poll

target state: running

scan_chain

0: idcode: 0x04570041 ir length 8, ir capture 0x1, ir mask 0x1, current instruct

ion 0xff

1: idcode: 0x25966041 ir length 4, ir capture 0x1, ir mask 0xf, current instruct

ion 0xc

2: idcode: 0x2457f041 ir length 5, ir capture 0x1, ir mask 0x1, current instruct

ion 0x1f

targets

0: arm966e (little endian), state: running

flash erase 0 1 2

can’t work with this flash while target is running

poll

target state: running

reg

(0) r0 (/32): 0x00000000 (dirty: 0, valid: 0)

(1) r1 (/32): 0x00000000 (dirty: 0, valid: 0)

(2) r2 (/32): 0x00000000 (dirty: 0, valid: 0)

(3) r3 (/32): 0x00000000 (dirty: 0, valid: 0)

(4) r4 (/32): 0x00000000 (dirty: 0, valid: 0)

(5) r5 (/32): 0x00000000 (dirty: 0, valid: 0)

(6) r6 (/32): 0x00000000 (dirty: 0, valid: 0)

(7) r7 (/32): 0x00000000 (dirty: 0, valid: 0)

(8) r8 (/32): 0x00000000 (dirty: 0, valid: 0)

(9) r9 (/32): 0x00000000 (dirty: 0, valid: 0)

(10) r10 (/32): 0x00000000 (dirty: 0, valid: 0)

(11) r11 (/32): 0x00000000 (dirty: 0, valid: 0)

(12) r12 (/32): 0x00000000 (dirty: 0, valid: 0)

(13) r13_usr (/32): 0x00000000 (dirty: 0, valid: 0)

(14) lr_usr (/32): 0x00000000 (dirty: 0, valid: 0)

(15) pc (/32): 0x00000000 (dirty: 0, valid: 0)

(16) r8_fiq (/32): 0x00000000 (dirty: 0, valid: 0)

(17) r9_fiq (/32): 0x00000000 (dirty: 0, valid: 0)

(18) r10_fiq (/32): 0x00000000 (dirty: 0, valid: 0)

(19) r11_fiq (/32): 0x00000000 (dirty: 0, valid: 0)

(20) r12_fiq (/32): 0x00000000 (dirty: 0, valid: 0)

(21) r13_fiq (/32): 0x00000000 (dirty: 0, valid: 0)

(22) lr_fiq (/32): 0x00000000 (dirty: 0, valid: 0)

(23) r13_irq (/32): 0x00000000 (dirty: 0, valid: 0)

(24) lr_irq (/32): 0x00000000 (dirty: 0, valid: 0)

(25) r13_svc (/32): 0x00000000 (dirty: 0, valid: 0)

(26) lr_svc (/32): 0x00000000 (dirty: 0, valid: 0)

(27) r13_abt (/32): 0x00000000 (dirty: 0, valid: 0)

(28) lr_abt (/32): 0x00000000 (dirty: 0, valid: 0)

(29) r13_und (/32): 0x00000000 (dirty: 0, valid: 0)

(30) lr_und (/32): 0x00000000 (dirty: 0, valid: 0)

(31) cpsr (/32): 0x00000000 (dirty: 0, valid: 0)

(32) spsr_fiq (/32): 0x00000000 (dirty: 0, valid: 0)

(33) spsr_irq (/32): 0x00000000 (dirty: 0, valid: 0)

(34) spsr_svc (/32): 0x00000000 (dirty: 0, valid: 0)

(35) spsr_abt (/32): 0x00000000 (dirty: 0, valid: 0)

(36) spsr_und (/32): 0x00000000 (dirty: 0, valid: 0)

(37) debug_ctrl (/6): 0x02 (dirty: 0, valid: 1)

(38) debug_status (/10): 0x0000 (dirty: 0, valid: 0)

(39) comms_ctrl (/32): 0x60000000 (dirty: 0, valid: 0)

(40) comms_data (/32): 0x00000000 (dirty: 0, valid: 0)

(41) watch 0 addr value (/32): 0x00000000 (dirty: 0, vali

(42) watch 0 addr mask (/32): 0x00000000 (dirty: 0, valid

(43) watch 0 data value (/32): 0x00000000 (dirty: 0, vali

(44) watch 0 data mask (/32): 0x00000000 (dirty: 0, valid

(45) watch 0 control value (/32): 0x00000000 (dirty: 0, v

(46) watch 0 control mask (/32): 0x00000000 (dirty: 0, va

(47) watch 1 addr value (/32): 0x00000000 (dirty: 0, vali

(48) watch 1 addr mask (/32): 0x00000000 (dirty: 0, valid

(49) watch 1 data value (/32): 0x00000000 (dirty: 0, vali

(50) watch 1 data mask (/32): 0x00000000 (dirty: 0, valid

(51) watch 1 control value (/32): 0x00000000 (dirty: 0, v

(52) watch 1 control mask (/32): 0x00000000 (dirty: 0, va

(53) vector catch (/32): 0x00000000 (dirty: 0, valid: 0)

poll

target state: running

Hi

That IAR gets very confused trying to use the OpenOCD telnet interface, that is to be expected.

Regarding the debug output, it looks normal. But it seems the target is not halted after reset. Since the target is running, the register values are not valid, and all flash commands fails. Try to do halt and then poll without the reset. Also check the reset configuration in your openocd.cfg configuration file.

Regards

Magnus

Magnus,

Thanks for the reply.

Here is the output when trying the halt command:

Open On-Chip Debugger

halt

requesting target halt…

poll

target state: running

My config is below:

#daemon configuration

telnet_port 4444

gdb_port 3333

#interface

interface ft2232

ft2232_device_desc “STR9-comStick A”

ft2232_layout usbjtag

jtag_speed 1

#use combined on interfaces or targets that can’t set TRST/SRST separately

reset_config trst_and_srst

#jtag scan chain

#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)

jtag_device 8 0x1 0x1 0xfe

jtag_device 4 0x1 0xf 0xe

jtag_device 5 0x1 0x1 0x1e

#target configuration

daemon_startup reset

#target

#target arm966e

target arm966e little reset_halt 1 arm966e

run_and_halt_time 0 30

working_area 0 0x50000000 16384 nobackup

#flash bank <chip_width> <bus_width>

flash bank str9x 0x00000000 0x00080000 0 0 0

Thanks,

Tom

Some more things to try:

Your version of OpenOCD (2007-04-16 19:30 CEST) is old.

Get the latest from Yagarto (windows) or http://developer.berlios.de/projects/openocd/ (Linux) .

Try to lower the jtag speed, higer values are slower, in the config file.

jtag_speed 10

/Magnus

Also as i said before you need to use the comstick layout, the reset will not work with the usbjtag layout.

ft2232_layout comstick

speed of 1 should be ok for the str9 comstick, but like Magnus says start with something like 10 until you can validate your setup.

Regards

Spen

Chaps,

Thanks very much for your replies.

I managed to get it to stop and it was due to me not using the correct config i.e. as Spen pointed out not having the layout set to comstick. I also upgraded the version of OpenOCD I was using (cheers Magnus) and I think the newer one had better support for the comstick as when I ran it with this command openocd-ftd2xxnew.exe -f ./configs/comstick.cfg I got onto the stick and the process was halted.

Now back to the work!

Cheers,

Tom

When i try to connect target with arm-usb-ocd jtag using openocd i got the following error

Info: openocd.c:93 main(): Open On-Chip Debugger (2007-09-05 09:00 CEST)

Error: embeddedice.c:181 embeddedice_build_reg_cache(): unknown EmbeddedICE version (comms ctrl: 0x80000000)

Warning: arm7_9_common.c:734 arm7_9_assert_reset(): srst resets test logic, too

Error: armv4_5.c:186 armv4_5_mode_to_number(): invalid mode value encountered

Error: arm7_9_common.c:1075 arm7_9_debug_entry(): cpsr contains invalid mode value - communication failure

Error: target.c:1157 handle_target(): couldn’t poll target, exiting

can anybody help me

On linux I have reset problem…

scoping around, it looks like it’s a openocd problem,

as doing a reset command via telnet… dos a JTAG and cpu RESET signal,

fine, but never generate’s a JTAG clock… so it has no way of reading the cpu state… etc

So having a look at the source… next few days see if I can find the problem…

Lachlan