Unable to Poll Target / Unknown State Errors

Development Boards MicroMod
1

Hi,

I am attempting to use OpenOCD with a Luminary LM3S811 Evaluation Board. When I start the OpenOCD daemon, (SVN trunk rev. 517), I see the following error and warning messages:

  • Error: target.c:1362 handle_target(): couldn’t poll target(-107). It’s due for a reset.

    Warning: cortex_m3.c:441 cortex_m3_halt(): target was in unknown state when halt was requested

    • I am running Ubuntu 7.04 and, (as alluded to above), have compiled OpenOCD from SVN revision 517. I am using the ftd2xx driver from FTDI. I can continue to produce the same error by issuing additional ‘reset’ commands from a telnet connection to the OpenOCD daemon. This problem is preventing me from debugging with ddd. Any help would be greatly appreciated.

    -Kyle

    My OopenOCD configuration file:

  • telnet_port 4444

    gdb_port 3333

    interface ft2232

    ft2232_device_desc “LM3S811 Evaluation Board A”

    ft2232_layout evb_lm3s811

    ft2232_vid_pid 0x0403 0xbcd9

    jtag_speed 10

    jtag_nsrst_delay 500

    reset_config srst_only separate

    jtag_device 4 0x1 0xf 0xe

    daemon_startup reset

    target cortex_m3 little run_and_halt 0

    working_area 0 0x20000800 0x1200 nobackup

    flash bank stellaris 0 0 0 0 0

    • The full debugging information is as follows:

  • Debug: 5 0 command.c:375 command_run_line(): script cortex_ft2232_dbg.cfg

    Debug: 6 0 configuration.c:87 open_file_from_path(): opened cortex_ft2232_dbg.cfg

    Debug: 7 1 command.c:375 command_run_line(): telnet_port 4444

    Debug: 8 1 command.c:375 command_run_line(): gdb_port 3333

    Debug: 9 1 command.c:375 command_run_line(): interface ft2232

    Debug: 10 1 command.c:375 command_run_line(): ft2232_device_desc “LM3S811 Evaluation Board A”

    Debug: 11 1 command.c:375 command_run_line(): ft2232_layout evb_lm3s811

    Debug: 12 1 command.c:375 command_run_line(): ft2232_vid_pid 0x0403 0xbcd9

    Debug: 13 1 command.c:375 command_run_line(): jtag_speed 10

    Debug: 14 1 command.c:375 command_run_line(): jtag_nsrst_delay 500

    Debug: 15 1 command.c:375 command_run_line(): reset_config srst_only separate

    Debug: 16 1 command.c:375 command_run_line(): jtag_device 4 0x1 0xf 0xe

    Debug: 17 1 command.c:375 command_run_line(): daemon_startup reset

    Debug: 18 1 command.c:375 command_run_line(): target cortex_m3 little run_and_halt 0

    Debug: 19 2 command.c:375 command_run_line(): working_area 0 0x20000800 0x1200 nobackup

    Debug: 20 2 command.c:375 command_run_line(): flash bank stellaris 0 0 0 0 0

    Debug: 21 2 jtag.c:1466 jtag_init(): -

    Debug: 22 4 ft2232.c:1336 ft2232_init_ftd2xx(): ‘ft2232’ interface using FTD2XX with ‘evb_lm3s811’ layout (0403:bcd9)

    Debug: 23 320 ft2232.c:1425 ft2232_init_ftd2xx(): current latency timer: 2

    Debug: 24 321 ft2232.c:1668 usbjtag_init(): 80 88 8b

    Debug: 25 322 ft2232.c:256 ft2232_speed(): 86 0a 00

    Debug: 26 331 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)

    Debug: 27 331 jtag.c:1235 jtag_reset_callback(): -

    Debug: 28 332 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)

    Debug: 29 332 jtag.c:1235 jtag_reset_callback(): -

    Info: 30 335 jtag.c:1329 jtag_examine_chain(): JTAG device found: 0x2ba00477 (Manufacturer: 0x23b, Part: 0xba00, Version: 0x2)

    Debug: 31 335 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)

    Debug: 32 335 jtag.c:1235 jtag_reset_callback(): -

    Debug: 33 337 openocd.c:114 main(): jtag init complete

    Debug: 34 337 cortex_swjdp.c:945 ahbap_debugport_init():

    Debug: 35 343 cortex_swjdp.c:986 ahbap_debugport_init(): AHB-AP ID Register 0x14770011, Debug ROM Address 0xe00ff003

    Debug: 36 345 target.c:960 target_read_u32(): address: 0xe000ed00, value: 0x410fc231

    Debug: 37 346 cortex_m3.c:1300 cortex_m3_init_target(): CORTEX-M3 processor detected

    Debug: 38 346 cortex_m3.c:1301 cortex_m3_init_target(): cpuid: 0x410fc231

    Debug: 39 353 target.c:960 target_read_u32(): address: 0xe000e004, value: 0x00000000

    Debug: 40 356 target.c:960 target_read_u32(): address: 0xe000e100, value: 0x00004000

    Debug: 41 356 cortex_m3.c:1309 cortex_m3_init_target(): interrupt enable[0] = 0x00004000

    Debug: 42 359 target.c:960 target_read_u32(): address: 0xe0002000, value: 0x00000260

    Debug: 43 359 cortex_m3.c:1324 cortex_m3_init_target(): FPB fpcr 0x260, numcode 6, numlit 2

    Debug: 44 362 target.c:960 target_read_u32(): address: 0xe0001000, value: 0x40000000

    Debug: 45 362 openocd.c:118 main(): target init complete

    Debug: 46 362 openocd.c:122 main(): flash init complete

    Debug: 47 362 openocd.c:126 main(): NAND init complete

    Debug: 48 362 openocd.c:130 main(): pld init complete

    Debug: 49 363 gdb_server.c:1965 gdb_init(): gdb service for target cortex_m3 at port 3333

    Debug: 50 363 ft2232.c:256 ft2232_speed(): 86 0a 00

    Debug: 51 364 cortex_m3.c:708 cortex_m3_assert_reset(): target->state: unknown

    Debug: 52 364 jtag.c:937 jtag_add_reset(): SRST line asserted

    Debug: 53 364 jtag.c:948 jtag_add_reset(): JTAG reset with tms instead of TRST

    Debug: 54 364 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)

    Debug: 55 364 jtag.c:1235 jtag_reset_callback(): -

    Debug: 56 364 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)

    Debug: 57 364 jtag.c:1235 jtag_reset_callback(): -

    Debug: 58 364 jtag.c:937 jtag_add_reset(): SRST line asserted

    Debug: 59 364 jtag.c:969 jtag_add_reset(): Now in TAP_TLR - Test-Logic-Reset(either due to TRST line asserted or tms reset)

    Debug: 60 433 cortex_m3.c:786 cortex_m3_deassert_reset(): target->state: reset

    Debug: 61 433 jtag.c:941 jtag_add_reset(): SRST line released

    Debug: 62 433 jtag.c:969 jtag_add_reset(): Now in TAP_TLR - Test-Logic-Reset(either due to TRST line asserted or tms reset)

    Debug: 63 939 cortex_swjdp.c:208 swjdp_transaction_endcheck(): swjdp: CTRL/STAT error 0x20

    Debug: 64 939 cortex_swjdp.c:945 ahbap_debugport_init():

    Debug: 65 945 cortex_swjdp.c:986 ahbap_debugport_init(): AHB-AP ID Register 0x14770011, Debug ROM Address 0xe00ff003

    Error: 66 945 target.c:1362 handle_target(): couldn’t poll target(-107). It’s due for a reset.

    Debug: 67 952 cortex_m3.c:420 cortex_m3_poll(): dcb_dhcsr 0x1010000, nvic_dfsr 0x0, target->state: unknown

    Debug: 69 1461 cortex_m3.c:420 cortex_m3_poll(): dcb_dhcsr 0x1010000, nvic_dfsr 0x0, target->state: unknown

    Debug: 70 1461 cortex_m3.c:431 cortex_m3_halt(): target->state: unknown

    Warning: 71 1461 cortex_m3.c:441 cortex_m3_halt(): target was in unknown state when halt was requested

    Debug: 72 1469 cortex_m3.c:420 cortex_m3_poll(): dcb_dhcsr 0x1030003, nvic_dfsr 0x1, target->state: halted

    Debug: 73 1469 ft2232.c:256 ft2232_speed(): 86 0a 00

    Debug: 74 1470 openocd.c:142 main(): target init reset complete


    • 2

    From that error the debug power domain is not being enabled.

    Try slowing the jtag speed down, to say 20.

    separate is also implied by default and so is not really required.

    use reset_halt rather than run_and_halt, as the cortex can reset correctly @ 0.

    Cheers

    Spen

    3

    I’ve made the changes you suggested, but I am also experiencing the same problems.

    I have managed to get everything else working, from compiling to flashing (using an old openocd version for cortex_m3 from 2006), but debugging doesn’t seem to work for either version of openocd.

    Debug:   6 16 command.c:375 command_run_line(): script cortex_ft2232_dbg.cfg
Debug:   7 16 configuration.c:87 open_file_from_path(): opened cortex_ft2232_dbg.cfg
Debug:   8 16 command.c:375 command_run_line(): telnet_port 4444
Debug:   9 16 command.c:375 command_run_line(): gdb_port 3333
Debug:   10 16 command.c:375 command_run_line(): interface ft2232
Debug:   11 16 command.c:375 command_run_line(): ft2232_device_desc "LM3S811 Evaluation Board A"
Debug:   12 16 command.c:375 command_run_line(): ft2232_layout evb_lm3s811
Debug:   13 16 command.c:375 command_run_line(): ft2232_vid_pid 0x0403 0xbcd9
Debug:   14 16 command.c:375 command_run_line(): jtag_speed 40
Debug:   15 16 command.c:375 command_run_line(): jtag_nsrst_delay 500
Debug:   16 16 command.c:375 command_run_line(): reset_config srst_only
Debug:   17 16 command.c:375 command_run_line(): jtag_device 4 0x1 0xf 0xe
Debug:   18 16 command.c:375 command_run_line(): daemon_startup reset
Debug:   19 16 command.c:375 command_run_line(): target cortex_m3 little reset_halt 0
Debug:   20 16 command.c:375 command_run_line(): working_area 0 0x20000800 0x1200 nobackup
Debug:   21 16 command.c:375 command_run_line(): flash bank stellaris 0 0 0 0 0
Debug:   22 16 jtag.c:1466 jtag_init(): -
Debug:   23 16 ft2232.c:1336 ft2232_init_ftd2xx(): 'ft2232' interface using FTD2XX with 'evb_lm3s811' layout (0403:bcd9)
Debug:   24 32 ft2232.c:1425 ft2232_init_ftd2xx(): current latency timer: 2
Debug:   25 32 ft2232.c:1668 usbjtag_init(): 80 88 8b
Debug:   26 32 ft2232.c:256 ft2232_speed(): 86 28 00
Debug:   27 47 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)
Debug:   28 47 jtag.c:1235 jtag_reset_callback(): -
Debug:   29 47 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)
Debug:   30 47 jtag.c:1235 jtag_reset_callback(): -
Info:    31 63 jtag.c:1329 jtag_examine_chain(): JTAG device found: 0x2ba00477 (Manufacturer: 0x23b, Part: 0xba00, Version: 0x2)
Debug:   32 63 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)
Debug:   33 63 jtag.c:1235 jtag_reset_callback(): -
Debug:   34 63 openocd.c:114 main(): jtag init complete
Debug:   35 63 cortex_swjdp.c:945 ahbap_debugport_init():  
Debug:   36 79 cortex_swjdp.c:986 ahbap_debugport_init(): AHB-AP ID Register 0x14770011, Debug ROM Address 0xe00ff003
Debug:   37 79 target.c:960 target_read_u32(): address: 0xe000ed00, value: 0x410fc231
Debug:   38 79 cortex_m3.c:1304 cortex_m3_init_target(): CORTEX-M3 processor detected
Debug:   39 79 cortex_m3.c:1305 cortex_m3_init_target(): cpuid: 0x410fc231
Debug:   40 79 target.c:960 target_read_u32(): address: 0xe000e004, value: 0x00000000
Debug:   41 94 target.c:960 target_read_u32(): address: 0xe000e100, value: 0x00000000
Debug:   42 94 cortex_m3.c:1313 cortex_m3_init_target(): interrupt enable[0] = 0x00000000
Debug:   43 94 target.c:960 target_read_u32(): address: 0xe0002000, value: 0x00000260
Debug:   44 94 cortex_m3.c:1328 cortex_m3_init_target(): FPB fpcr 0x260, numcode 6, numlit 2
Debug:   45 94 target.c:960 target_read_u32(): address: 0xe0001000, value: 0x40000000
Debug:   46 94 openocd.c:118 main(): target init complete
Debug:   47 94 openocd.c:122 main(): flash init complete
Debug:   48 94 openocd.c:126 main(): NAND init complete
Debug:   49 94 openocd.c:130 main(): pld init complete
Debug:   50 110 gdb_server.c:1965 gdb_init(): gdb service for target cortex_m3 at port 3333
Debug:   51 110 ft2232.c:256 ft2232_speed(): 86 28 00
Debug:   52 125 cortex_m3.c:536 cortex_m3_prepare_reset_halt(): dcb_dhcsr 0x1010001, dcb_demcr 0x1000501, 
Debug:   53 125 cortex_m3.c:709 cortex_m3_assert_reset(): target->state: unknown
Debug:   54 125 jtag.c:937 jtag_add_reset(): SRST line asserted
Debug:   55 125 jtag.c:948 jtag_add_reset(): JTAG reset with tms instead of TRST
Debug:   56 125 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)
Debug:   57 125 jtag.c:1235 jtag_reset_callback(): -
Debug:   58 125 jtag.c:305 jtag_call_event_callbacks(): jtag event: JTAG controller reset(tms or TRST)
Debug:   59 125 jtag.c:1235 jtag_reset_callback(): -
Debug:   60 125 jtag.c:937 jtag_add_reset(): SRST line asserted
Debug:   61 125 jtag.c:969 jtag_add_reset(): Now in TAP_TLR - Test-Logic-Reset(either due to TRST line asserted or tms reset)
Debug:   62 188 cortex_m3.c:432 cortex_m3_halt(): target->state: reset
Debug:   63 188 cortex_m3.c:783 cortex_m3_deassert_reset(): target->state: reset
Debug:   64 188 jtag.c:941 jtag_add_reset(): SRST line released
Debug:   65 188 jtag.c:969 jtag_add_reset(): Now in TAP_TLR - Test-Logic-Reset(either due to TRST line asserted or tms reset)
Debug:   66 688 cortex_swjdp.c:208 swjdp_transaction_endcheck(): swjdp: CTRL/STAT error 0x20
Debug:   67 688 cortex_swjdp.c:945 ahbap_debugport_init():  
Debug:   68 704 cortex_swjdp.c:986 ahbap_debugport_init(): AHB-AP ID Register 0x14770011, Debug ROM Address 0xe00ff003
Error:   69 704 target.c:1362 handle_target(): couldn't poll target(-107). It's due for a reset.
Debug:   70 719 cortex_m3.c:421 cortex_m3_poll(): dcb_dhcsr 0x1010000, nvic_dfsr 0x0, target->state: unknown
Debug:   71 719 ft2232.c:256 ft2232_speed(): 86 28 00
Debug:   72 719 openocd.c:142 main(): target init reset complete
Debug:   73 813 cortex_m3.c:421 cortex_m3_poll(): dcb_dhcsr 0x1010000, nvic_dfsr 0x0, target->state: unknown
Debug:   74 922 cortex_m3.c:421 cortex_m3_poll(): dcb_dhcsr 0x1010000, nvic_dfsr 0x0, target->state: unknown
... [this keeps repeating]
    4

    Looks like you are suffering from the same problem, the debug power domains are not being enabled.

    I do not have access to a LM3S811 board so it could be a problem, only stm32 targets.

    Do you know which svn revision was working, it could be a starting point.

    Cheers

    Spen

    5

    r520 windows binary. I was able to successfully flash/debug the stm32 cortex (STM32F103RBT6) using r423 and the olimex usb jtag programmer, but am having difficulties with the lm3s811 using their usb cable and their evaluation board.

    6

    I am confused, which version is working for which targets?

    stm32 is working fine on all the version i have tried including svn trunk.

    Cheers

    Spen

    7

    Sorry, I didnt mean to confuse the issue. I meant that I have been able to program/debug the stm32 successfully with recent versions (namely r423), although I haven’t tried with r520.

    The LM3S811 I couldn’t program or debug using r520 or r423, but was able to program using the old openocd version i found at http://www.siwawi.arubi.uni-kl.de/avr_p … index.html dated 2006. that old version couldn’t debug, however.

    8

    ntfreak,

    Thanks for your initial reply. I will try your suggestions tonight and post my results.

    As an interesting side note, I am able to flash and debug the LM3S811 evaluation board using the cortex-m3 SVN branch of the OpenOCD code (again Rev. 517).

    -K

    9

    This is where i am confused rev 517 is openocd trunk, not the cortex_m3 branch.

    Could you clarify on the working versions?

    Cheers

    Spen

    10

    Spen,

    Because the trunk and branches are all part of the same basic repository, their revision numbers are incremented simultaneously. Every time someone commits a change to the trunk, the branch revision numbers are also incremented. This does not mean that the branch code has actually changed. You’d have to delve into the logs to determine when the cortex-m3 branch code changed last.

    I just did a new SVN checkout of the cortex-m3 branch and it reports that I’ve checked out Rev. 522. So, I’m confident that 3 days ago I did indeed checkout and compile 517 (which was the head revision at the time).

    Best,

    -Kyle

    11

    I did some more investigation and it looks like the cortex-m3 branch was last updated with Rev. 125…ouch. I’m certainly out of date, but the code does seem to work.

    -Kyle

    12

    I am well aware how svn works.

    The cortex_m3 branch was closed over a year ago, all dev is now in trunk.

    If you find that the cortex_m3 branch works then that is a starting point, but the code has changed quite a bit since then. Infact rev125 was the last commit to that branch, so it is very out of date.

    Cheers

    Spen

    13

    Spen,

    What do you suggest at this point? Is it likely that the code to enable the debug power domain exists in the ./targets/cortex*.c files or somewhere else? I can start doing some diffs to look for changes, but some additional direction would be helpful.

    -Kyle

    14

    The code that look like it is failing is ahbap_debugport_init, where the debug domains are being turned on.

    It could be worth adding the following:

    ahbap_read_reg_u32(swjdp, 0xFC, &idreg);

    ahbap_read_reg_u32(swjdp, 0xF8, &romaddr);

    jtag_execute_queue();

    and seeing what the dummy reg contains after the jtag_execute_queue.

    Cheers

    Spen

    15

    Okay, I’ll try that, (hopefully tonight).

    Can you suggest a good reference for the SWJ register definitions so that I can understand in detail what the code you suggested is attempting to do?

    Thanks

    Kyle

    16

    http://infocenter.arm.com/help/topic/co … dcgbd.html and the Control/Status Register CTRL/STAT section.

    Cheers

    Spen

    17

    Hi all,

    I have the same problem on Windows Vista. I’m using openOCD 204, ARM-USB-TINY. Here’s what I get:

    Error: ft2232.c:1341 ft2232_init_ftd2xx(): unable to open ftdi device: 2

    Error: ft2232.c:1356 ft2232_init_ftd2xx(): ListDevices: 2

    Error: ft2232.c:1358 ft2232_init_ftd2xx(): 0: Olimex OpenOCD JTAG TINY B

    Error: ft2232.c:1358 ft2232_init_ftd2xx(): 1: Xš:

    This is the part of the config that matters:

    #interface

    interface ft2232

    ft2232_device_desc “Olimex OpenOCD JTAG TINY A”

    ft2232_layout “olimex-jtag”

    ft2232_vid_pid 0x15BA 0x0004

    jtag_speed 20

    What is the solution?

    Thanks,

    Gil

    18

    Hi all,

    I have the same problem on Windows Vista. I’m using openOCD 204, ARM-USB-TINY. Here’s what I get:

    Error: ft2232.c:1341 ft2232_init_ftd2xx(): unable to open ftdi device: 2

    Error: ft2232.c:1356 ft2232_init_ftd2xx(): ListDevices: 2

    Error: ft2232.c:1358 ft2232_init_ftd2xx(): 0: Olimex OpenOCD JTAG TINY B

    Error: ft2232.c:1358 ft2232_init_ftd2xx(): 1: Xš:

    This is the part of the config that matters:

    #interface

    interface ft2232

    ft2232_device_desc “Olimex OpenOCD JTAG TINY A”

    ft2232_layout “olimex-jtag”

    ft2232_vid_pid 0x15BA 0x0004

    jtag_speed 20

    What is the solution?

    Thanks,

    Gil

    19

    Problem solved with this config:

    telnet_port 4444

    gdb_port 3333

    interface ft2232

    ft2232_device_desc “Olimex OpenOCD JTAG TINY A”

    ft2232_layout “olimex-jtag”

    ft2232_vid_pid 0x15BA 0x0004

    jtag_speed 20

    reset_config trst_and_srst separate

    jtag_device 4 0x1 0xf 0xe

    jtag_nsrst_delay 333

    jtag_ntrst_delay 333

    daemon_startup reset

    target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4

    run_and_halt_time 0 30

    target_script 0 reset oocd_flash2294.script

    working_area 0 0x40000000 0x4000 nobackup

    flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum

    Thanks,

    Gil