Wasn’t really sure what to name the topic lol, but I could use some input for this circuit. Attached is the entire schematic as of current.
I’m designing a circuit board to break out the pins of the Z180 processor, but I also decided to include some supporting circuitry and indicator/status LEDs to keep the external (prototyping) circuit smaller. My main three questions are:
How does the reset circuit look?
Should I adapt it into the interrupt triggers?
How does the custom OR logic (left side of diagram) look?
Take note that it’s not worth looking into transistor part numbers and ratings. They’re just drop-ins to populate the schematic and eventual circuit board. I’ll do the research and find good ones to use when I get to that point. I also don’t have any connectors added yet. Any other suggestions are also welcome.
I always suggest printing one piece at first and seeing the performance. Sometimes designs look OK at a glance, but several drawbacks start to show after printing and assembling. I suggest you make a prototype and test it thoroughly. Here is also a minimal design of the Z180 board. You can check it for more references.
Most of the design is based directly off of another project. The status LED circuits are basically a direct copy. The custom OR gates are a new concept because KiCAD didn’t have the quad 2-input chips (it did have the NOR ones, but I decided to have a little fun with making my own instead of playing with what it did have).
The reset circuit is a gently-modified version of another one that I know works. The original design had the P-channel FET to directly short out the capacitor, so I added a resistor this time to avoid short circuiting. The problem is it creates a voltage divider now when activated. I chose 10k and 100 ohm to make it 1/100 VDD, which should be low enough to activate the reset.
I may add the supporting circuitry to allow crystals to be directly plugged in, but I probably won’t since I plan to mainly use the CMOS version of the 555 timer.
This is by no means going to be a final version, even if it works perfectly. It’s just a stage one for a future project. This one is just to enable the ability to prototype with the CPU. The data sheet claims there to be a DIP package, but I have yet to see a single one. If I did find it, I would doubt that it’s in a through-hole variant that can plug directly into a breadboard. That’s actually why I started this particular project—to make a “breakout board” that can be connected to a breadboard, be it by directly inserting it into the breadboard or by using a series of wire in a similar manner as connecting an Uno into the board. Everything else I decided to do was more of a “well, while I’m at it, I’ll add these just to have them there if ever needed.”
I added the connectors to the schematic, though I do plan to adjust the CLOCK one to include VCC and GND. This is mainly so that if I decide to make a plug-in PCB clock module, I won’t have to worry about bringing power in from elsewhere.
Someone asked me about the reset circuit and BUS_RST. I set it up so that the actual CPU reset pin is isolated from the system bus because any circuit on the bus would have to deal with discharging the capacitor otherwise. I also need to go through and finish editing references/values of resistors and LEDs, but I believe it’s pretty much ready for the PCB layout phase if no one has anything to add.
I find this schematic very hard to read. Here are a few suggestions:
Use power symbols for Vcc and GND.
Pick one of Vcc/Vdd and of Vss/GND for net names
Rotate the various sections so Vcc is on top, GND on the bottom, and signals flow left to right.
KiCAD does have quad 2-input OR gates - look at the 74LS32 (or other families). If you can’t find a symbol, either create your own or look on Digikey to see if you can download one
J3 should have more ground pins.
100n and 10n capacitors are usually ceramic and not electolytics; use the correct symbol
The processor (and any other IC you add) should have one 100n cap per power pin, and when you lay out the board, these caps should be right next to each power pin
The crystal will need caps to ground; crystal traces must be kept short.
Hecc. I forgot about those (it’s been a while >~<)
That’s actually to help me. When the parts use one or the other, I use the label it does. When the part doesn’t, I use whichever comes to my head first. I’ve forgotten to change labels in the past and it resulted in unusable boards
Is it possible to change the page size? Limited space is a direct reason some of the parts are rotated how they are.
The only OR gates it was giving me in the search was something like 74H3Q[…]. All other results were NOR logic. I still could have used NOR and had the same part count, but eh. At this point, it’s just personal gratification.
I actually intended for it to not have any, but I ended up with one extra pin. I’ll probably swap it out with PHI when I go to redo J4.
checks another project Oh, I’m actually using the wrong values…
I wasn’t sure if I should worry about that due to it being for prototyping, but I’ll add it. Also, I thought it was one per IC as opposed to being per pin?
Mmm . Sure, I’ll add those ig. Should the caps be set for the crystal frequency? I’m wanting the clock speed to be variable and, therefore, the crystal changeable
. Sure, I’ll add those ig. Should the caps be set for the crystal frequency? I’m wanting the clock speed to be variable and, therefore, the crystal changeable