ARES 7 Pro Power Plane Problem

Archive BatchPCB
1

I use ARES 7 Pro to design my PCBs and every time I use power plane my designs fail to pass DRC test. I set default rules to what BatchPCB requires so I’m not sure what’s the problem. I will include log files and images so if anyone knows what the problem could be please help!

Beginning GCODE run
Ending GCODE run
Created 2759 polygons
Found 0 errors
Partitioning....
Grouping...
Distance testing
MergeCount: 2742
tests: 903465
Board boundaries: Rect: [-0.807000,-0.728300] -> [0.531400,0.295200], w: 1.338400, h: 1.023500
Found 17 groups
lengthdb size 0
DRC Error - trace to narrow
DRC Error - trace to narrow
DRC Error - trace to narrow
DRC Error - trace to narrow
DRC Error - trace to narrow
DRC Error - trace to narrow
DRC Error - trace to narrow
DRC Error - trace to narrow
...

Bottom:

http://img180.imageshack.us/img180/3575/bottomk.png

Top:

http://img441.imageshack.us/img441/746/topx.png

As you can see, the whole power plane is highlited orange, so I have no idea where the problem is.

2

On http://img180.imageshack.us/img180/3575/bottomk.png I wonder if the ground pour at 226, 186 may be less than .008 wide. There may be other such spots.

See if your software has a way to set a minimum width for the pour.

But maybe it is not that. It may think that the orange area and the green area on the border of the pour are different nets.

Edit: See the last post on the viewtopic.php?f=16&t=21725 thread.

3

I tried to remove power plane completely and added a small bottom copper square, DRC gave me exactly the same error and highlighted that square orange. As for the green border, I’m not sure what that is, it wasn’t on my PCB design, maybe it’s a board edge added by the DRC bot.

http://img195.imageshack.us/img195/2441/bottommr.png

4

I think it’s what has been said, it’s probably that the pour is made of small traces, less than .008".

5

Yeah, I think that’s the problem. I’m currently trying to figure out the difference between my files and files that pass DRC test so maybe I can write a simple program in VB that will rerender power planes for BatchPCB.

6

Gintaras:
Yeah, I think that’s the problem. I’m currently trying to figure out the difference between my files and files that pass DRC test so maybe I can write a simple program in VB that will rerender power planes for BatchPCB.

If I am thinking right, you would plan to analyze the gerber file, and output a modified gerber file to replace the original. That would be impressive.

Maybe they could modifiy the DRC to run a failed copper trace thru your program to see if that output could pass the DRC.

7

This has come up before. I think A!tium had a similar problem. I think you can just send an e-mail to BatchPCB and they will manually pass your gerbers.

8

I have this problem too, and I’m using Ares 6.5.

I’ve talked to support and they verified that it’s a DRC ghost and passed my design for me. I feel bad, though, because it means that I’ll have to hassle them for every new design. If anyone figures out a workaround, please post it, and I pledge to do so as well.

9

Absolutely if you ever feel that your design should be passed, feel free to email me @ support@batchpcb.com.