I have ordered from batchpcb before and have been satisfied, however today I am a little stumped. DRC bot keeps telling me the is an error in my design, but I can’t find it on the images it gives me. The are errors in the log for the top side though, they are:
DRC space fail: [0x8102248 0x8104b68] 0.000100 - 0.006900
DRC space fail: [0x8104b68 0x8102248] 0.000100 - 0.006900
DRC space fail: [0x8105968 0x81059d8] 0.000100 - 0.006900
but nothing is highlighted on the image it gives me, as you can see:
Your ground-pour looks pretty tight, less than 0.008" clearance. Try change the design rule to 0.010-0.015" clearance between ground fill and other nets. Also, those long traces are pretty close to each other, I would thin them a bit.
Right click on your planes, look for “Isolate”, and set it to 0.008 or higher. This will change the distance between the plane and other features.
You have room on the right side of the board. Try running the traces that currently run under the ICs there instead. Since the DRC bot only gave 3 errors, this traces are probably at fault.
Right click on your planes, look for “Isolate”, and set it to 0.008 or higher. This will change the distance between the plane and other features.
You have room on the right side of the board. Try running the traces that currently run under the ICs there instead. Since the DRC bot only gave 3 errors, this traces are probably at fault.
1) it is 0.01 already
every time I do that, my polygons fall apart
TheDirty:
I can’t imagine how those dimension lines got through. Usually it complains about those.
EDIT: I see it. The red line is at the very top of the image. It’s the dimension line.
Ahh, I see it too now. What is wrong with it? How do I fix that? :|
Sorry to be a noob, I didn’t have any trouble like this last time.
TheDirty:
I think it’s spacing between the edge of the board that is the issue. Just don’t export that dimension layer to your gerber.
Just tried exporting my design without the dimension layer, and it works fine. It is odd that the SFE cam file that batchpcb recommends would be set up like that if it can cause problems.
how will they know what outline I want for my board without the dimension layer though?
I just recently had a similar problem. Since the SFE Cam job exports the dimension layer to top copper, it complained about the 0mil “trace”, but only on one side of the board. I got around this by changing the dimension line to 8mil. the DRCbot didn’t used to do this…maybe they changed something badly.
In answer to your question, the FAQ states that multiple people look at your design. Usually it is fairly simple to see where the outline should go. To help them out, they state you should make an outline on either copper layer, or silkscreen. Since the SFE Cam exports to top copper, I’d use that.
The DRCBot probably hasn’t changed - since the code inside is nightmarish, and I don’t think anyone but I is brave enough to face the horrors ;).
There are a few numerical errors possible when computing intersections/spacings of 0mil traces. Just make them 0.01 mil and that should solve the issues.
I’ve got a similar problem. The board pic should be below with the highlighted error. I can’t figure out what it doesn’t like about it, it’s claiming the 8mil rule, but i’ve fiddled with the package and there’s at least 12mil between the pads:
I don’t know, Whiternoise. I would wonder if the bot thinks those 4 red pads are not supposed to be connected to the traces atop them. I would view that layer with gerbv and see if you can see anthing odd about the traces and pads in that area.
I guess those pads across the top are for individual wires or contacts. I don’t see a pattern to the staggering.
They’re button contacts (i’m using a Nintendo DS D-Pad for navigation), so half of the pads are grounded. When the buttons are pressed, the connections are made and the signal going into the microcontroller (just an AVR) changes.
In that respect they’re definitely supposed to be connected - the ground connection is routed from all the halves through the bottom pad into the ground plane.
I’ll see what gerbv has to say - it looked alright before I uploaded it though!
Are those actual pads, or planes? If planes, it might be complaining that the trace overlaps the plane. If using Eagle, make sure the plane has the same net name as the wires. Not sure what else could be wrong…
They’re pads for sure, if I delete the traces, they’ll have airwires sprouting off them. If I can’t figure it out i’ll see if BatchPCB will let it go through anyway
Orange coloring indicates something created with vector tracks < 7.8mil. The DRC codebase currently in use at SFE can’t coalesce individual draws to create one large drawn area - so if that large pad is made up of individual tiny vector strokes, the DRC bot will choke.
Just ask batchPCB to manually pass it; assuming all other things are OK.
As long as the eagle drc, checks out your design correctly you are in the clear. The bot has a few glitches, so if you believe the design should be passed feel free to email me at support@batchpcb.com
