Hi there,
I was wondering if the 4-layer batchpcb option allowed for blind vias, or if all vias have to span the full board depth.
If blind vias are allowed, how should one go about generating the drill files for the multilayer board?
Thanks in advance
No blind vias allowed - those drive fab price way up.
Cheers,
–David Carne
Just to verify in Eagle-ese then, the correct layer setup is “(12+1516)” meaning - 4 layers of copper (here called 1,2,15,16) with 1&2, 15&16 each sharing a common core, with plated vias passing only through the full stack?